JP2007157287A5 - - Google Patents

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Publication number
JP2007157287A5
JP2007157287A5 JP2005353947A JP2005353947A JP2007157287A5 JP 2007157287 A5 JP2007157287 A5 JP 2007157287A5 JP 2005353947 A JP2005353947 A JP 2005353947A JP 2005353947 A JP2005353947 A JP 2005353947A JP 2007157287 A5 JP2007157287 A5 JP 2007157287A5
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JP
Japan
Prior art keywords
potential
operation mode
semiconductor memory
memory device
potential supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2005353947A
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English (en)
Japanese (ja)
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JP2007157287A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2005353947A priority Critical patent/JP2007157287A/ja
Priority claimed from JP2005353947A external-priority patent/JP2007157287A/ja
Priority to US11/634,110 priority patent/US7542368B2/en
Priority to CNA2006101640994A priority patent/CN1979691A/zh
Publication of JP2007157287A publication Critical patent/JP2007157287A/ja
Publication of JP2007157287A5 publication Critical patent/JP2007157287A5/ja
Priority to US12/425,018 priority patent/US7778075B2/en
Priority to US12/838,119 priority patent/US20100277991A1/en
Withdrawn legal-status Critical Current

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JP2005353947A 2005-12-07 2005-12-07 半導体記憶装置 Withdrawn JP2007157287A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2005353947A JP2007157287A (ja) 2005-12-07 2005-12-07 半導体記憶装置
US11/634,110 US7542368B2 (en) 2005-12-07 2006-12-06 Semiconductor memory device
CNA2006101640994A CN1979691A (zh) 2005-12-07 2006-12-07 半导体存储器件
US12/425,018 US7778075B2 (en) 2005-12-07 2009-04-16 Semiconductor memory device
US12/838,119 US20100277991A1 (en) 2005-12-07 2010-07-16 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005353947A JP2007157287A (ja) 2005-12-07 2005-12-07 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2007157287A JP2007157287A (ja) 2007-06-21
JP2007157287A5 true JP2007157287A5 (enExample) 2008-12-18

Family

ID=38130814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005353947A Withdrawn JP2007157287A (ja) 2005-12-07 2005-12-07 半導体記憶装置

Country Status (3)

Country Link
US (3) US7542368B2 (enExample)
JP (1) JP2007157287A (enExample)
CN (1) CN1979691A (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5288391B2 (ja) * 2007-05-24 2013-09-11 ルネサスエレクトロニクス株式会社 半導体記憶装置
US7793181B2 (en) * 2008-03-27 2010-09-07 Arm Limited Sequential storage circuitry for an integrated circuit
US7872930B2 (en) * 2008-05-15 2011-01-18 Qualcomm, Incorporated Testing a memory device having field effect transistors subject to threshold voltage shifts caused by bias temperature instability
US7852661B2 (en) * 2008-10-22 2010-12-14 Taiwan Semiconductor Manufacturing Company, Ltd. Write-assist SRAM cell
JP2010170595A (ja) * 2009-01-20 2010-08-05 Panasonic Corp 半導体記憶装置
JP2011018420A (ja) * 2009-07-10 2011-01-27 Toshiba Corp 半導体記憶装置およびワード線電位の制御方法
TWI440043B (zh) * 2009-09-08 2014-06-01 Toshiba Kk Semiconductor memory device
US8466707B2 (en) 2010-03-03 2013-06-18 Qualcomm Incorporated Method and apparatus for testing a memory device
US9858986B2 (en) * 2010-08-02 2018-01-02 Texas Instruments Incorporated Integrated circuit with low power SRAM
JP2012064292A (ja) * 2010-09-17 2012-03-29 Toshiba Corp 半導体集積回路
CN102411983B (zh) * 2010-09-21 2013-12-04 智原科技股份有限公司 依据数据动态供电的随机存取存储器
US8213242B2 (en) * 2010-09-23 2012-07-03 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cells having a row-based read and/or write support circuitry
US9455021B2 (en) * 2011-07-22 2016-09-27 Texas Instruments Incorporated Array power supply-based screening of static random access memory cells for bias temperature instability
US8971138B2 (en) * 2011-09-01 2015-03-03 Texas Instruments Incorporated Method of screening static random access memory cells for positive bias temperature instability
JP5937895B2 (ja) * 2012-06-05 2016-06-22 株式会社日立製作所 半導体集積回路装置
US9218872B1 (en) * 2014-06-20 2015-12-22 Taiwan Semiconductor Manufactruing Company, Ltd. Memory chip and layout design for manufacturing same
US9424909B1 (en) * 2015-03-17 2016-08-23 Qualcomm Incorporated Static random access memory (SRAM) arrays having substantially constant operational yields across multiple modes of operation
US9613691B2 (en) * 2015-03-27 2017-04-04 Intel Corporation Apparatus and method for drift cancellation in a memory
JP2017111483A (ja) 2015-12-14 2017-06-22 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の診断方法
US9627041B1 (en) * 2016-01-29 2017-04-18 Qualcomm Incorporated Memory with a voltage-adjustment circuit to adjust the operating voltage of memory cells for BTI effect screening
US9824767B1 (en) 2016-06-29 2017-11-21 Intel Corporation Methods and apparatus to reduce threshold voltage drift
KR102679560B1 (ko) * 2018-10-25 2024-07-01 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법
JP6746659B2 (ja) * 2018-11-09 2020-08-26 華邦電子股▲ふん▼有限公司Ｗｉｎｂｏｎｄ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏｒｐ． メモリデバイス及びその内蔵セルフテスト方法
US11568951B2 (en) * 2019-03-13 2023-01-31 Texas Instruments Incorporated Screening of memory circuits
CN114631143B (zh) * 2019-11-11 2025-10-17 高通股份有限公司 用于双电源存储器的低功率且稳健的电平移位脉冲锁存器
CN114720831A (zh) * 2021-01-04 2022-07-08 长鑫存储技术有限公司 热载流子效应退化性能的评估方法
JP7676300B2 (ja) * 2021-12-27 2025-05-14 ルネサスエレクトロニクス株式会社 半導体装置およびｓｒａｍ回路のテスト方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0756759B2 (ja) * 1990-12-27 1995-06-14 株式会社東芝 スタティック型半導体記憶装置
US5463585A (en) * 1993-04-14 1995-10-31 Nec Corporation Semiconductor device incorporating voltage reduction circuit therein
JPH11185498A (ja) * 1997-12-24 1999-07-09 Mitsubishi Electric Corp スタティック型半導体記憶装置
US6081465A (en) * 1998-04-30 2000-06-27 Hewlett-Packard Company Static RAM circuit for defect analysis
JP2000322900A (ja) * 1999-05-12 2000-11-24 Mitsubishi Electric Corp 半導体記録装置
EP1357672B1 (en) * 1999-06-25 2006-08-30 Samsung Electronics Co., Ltd. Apparatus and method for channel coding and multiplexing in a CDMA communication system
KR100471168B1 (ko) * 2002-05-27 2005-03-08 삼성전자주식회사 반도체 메모리 장치의 불량 셀을 스크린하는 회로, 그스크린 방법 및 그 스크린을 위한 배치 방법
KR100518579B1 (ko) * 2003-06-05 2005-10-04 삼성전자주식회사 반도체 장치 및 그 테스트 방법
US7333357B2 (en) * 2003-12-11 2008-02-19 Texas Instruments Incorproated Static random access memory device having reduced leakage current during active mode and a method of operating thereof
JP4256327B2 (ja) * 2004-11-05 2009-04-22 株式会社東芝 スタティックランダムアクセスメモリ、および擬似スタティックノイズマージンの計測方法
US7376001B2 (en) * 2005-10-13 2008-05-20 International Business Machines Corporation Row circuit ring oscillator method for evaluating memory cell performance
US7349271B2 (en) * 2005-10-13 2008-03-25 International Business Machines Corporation Cascaded test circuit with inter-bitline drive devices for evaluating memory cell performance
JP4768437B2 (ja) * 2005-12-26 2011-09-07 株式会社東芝 半導体記憶装置

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