JP2007005536A5 - - Google Patents

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Publication number
JP2007005536A5
JP2007005536A5 JP2005183264A JP2005183264A JP2007005536A5 JP 2007005536 A5 JP2007005536 A5 JP 2007005536A5 JP 2005183264 A JP2005183264 A JP 2005183264A JP 2005183264 A JP2005183264 A JP 2005183264A JP 2007005536 A5 JP2007005536 A5 JP 2007005536A5
Authority
JP
Japan
Prior art keywords
metal wiring
layer
dummy
via patterns
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005183264A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007005536A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2005183264A priority Critical patent/JP2007005536A/ja
Priority claimed from JP2005183264A external-priority patent/JP2007005536A/ja
Priority to US11/455,699 priority patent/US7420278B2/en
Publication of JP2007005536A publication Critical patent/JP2007005536A/ja
Publication of JP2007005536A5 publication Critical patent/JP2007005536A5/ja
Priority to US12/186,973 priority patent/US20080296777A1/en
Priority to US12/461,134 priority patent/US7843066B2/en
Priority to US12/884,256 priority patent/US8004086B2/en
Pending legal-status Critical Current

Links

JP2005183264A 2005-06-23 2005-06-23 半導体装置 Pending JP2007005536A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2005183264A JP2007005536A (ja) 2005-06-23 2005-06-23 半導体装置
US11/455,699 US7420278B2 (en) 2005-06-23 2006-06-20 Semiconductor device
US12/186,973 US20080296777A1 (en) 2005-06-23 2008-08-06 Semiconductor device
US12/461,134 US7843066B2 (en) 2005-06-23 2009-08-03 Semiconductor device
US12/884,256 US8004086B2 (en) 2005-06-23 2010-09-17 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005183264A JP2007005536A (ja) 2005-06-23 2005-06-23 半導体装置

Publications (2)

Publication Number Publication Date
JP2007005536A JP2007005536A (ja) 2007-01-11
JP2007005536A5 true JP2007005536A5 (enExample) 2008-07-10

Family

ID=37566364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005183264A Pending JP2007005536A (ja) 2005-06-23 2005-06-23 半導体装置

Country Status (2)

Country Link
US (4) US7420278B2 (enExample)
JP (1) JP2007005536A (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006046182B4 (de) * 2006-09-29 2010-11-11 Infineon Technologies Ag Halbleiterelement mit einer Stützstruktur sowie Herstellungsverfahren
US9466579B2 (en) * 2007-07-26 2016-10-11 Nxp B.V. Reinforced structure for a stack of layers in a semiconductor component
JP4770841B2 (ja) * 2008-01-07 2011-09-14 パナソニック株式会社 半導体装置
JP5334459B2 (ja) 2008-05-30 2013-11-06 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8476629B2 (en) * 2011-09-27 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Enhanced wafer test line structure
US8796855B2 (en) 2012-01-13 2014-08-05 Freescale Semiconductor, Inc. Semiconductor devices with nonconductive vias
US9041204B2 (en) * 2012-03-30 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Bonding pad structure with dense via array
JP5968711B2 (ja) * 2012-07-25 2016-08-10 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
JP5580458B2 (ja) * 2013-07-29 2014-08-27 ルネサスエレクトロニクス株式会社 半導体装置
US9620460B2 (en) 2014-07-02 2017-04-11 Samsung Electronics Co., Ltd. Semiconductor chip, semiconductor package and fabricating method thereof
US9542522B2 (en) * 2014-09-19 2017-01-10 Intel Corporation Interconnect routing configurations and associated techniques
KR102272214B1 (ko) * 2015-01-14 2021-07-02 삼성디스플레이 주식회사 표시 장치
KR102019355B1 (ko) 2017-11-01 2019-09-09 삼성전자주식회사 반도체 패키지
JP7085417B2 (ja) * 2018-06-25 2022-06-16 ルネサスエレクトロニクス株式会社 半導体装置
KR102807501B1 (ko) * 2019-10-02 2025-05-16 삼성전자주식회사 두꺼운 금속층을 갖는 반도체 소자들
JP2021082703A (ja) 2019-11-19 2021-05-27 キオクシア株式会社 半導体装置およびその製造方法
KR102858393B1 (ko) * 2021-02-18 2025-09-11 삼성디스플레이 주식회사 표시 장치

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10247664A (ja) * 1997-03-04 1998-09-14 Hitachi Ltd 半導体集積回路装置およびその製造方法
US6037668A (en) * 1998-11-13 2000-03-14 Motorola, Inc. Integrated circuit having a support structure
JP2001196413A (ja) * 2000-01-12 2001-07-19 Mitsubishi Electric Corp 半導体装置、該半導体装置の製造方法、ｃｍｐ装置、及びｃｍｐ方法
JP2001217248A (ja) * 2000-02-04 2001-08-10 Nec Corp 半導体装置の配線形成方法
JP2001267323A (ja) 2000-03-21 2001-09-28 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2003218114A (ja) * 2002-01-22 2003-07-31 Toshiba Corp 半導体装置及びその製造方法
JP2003273221A (ja) * 2002-03-15 2003-09-26 Fujitsu Ltd 配線の遅延調整を可能にする集積回路のレイアウト方法及びそのプログラム
US6908841B2 (en) * 2002-09-20 2005-06-21 Infineon Technologies Ag Support structures for wirebond regions of contact pads over low modulus materials
JP2005085939A (ja) * 2003-09-08 2005-03-31 Renesas Technology Corp 半導体装置およびその製造方法
JP4579621B2 (ja) * 2003-09-26 2010-11-10 パナソニック株式会社 半導体装置
JP2006024698A (ja) * 2004-07-07 2006-01-26 Toshiba Corp 半導体装置及びその製造方法

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