JP2007142436A5 - - Google Patents
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- Publication number
- JP2007142436A5 JP2007142436A5 JP2006313358A JP2006313358A JP2007142436A5 JP 2007142436 A5 JP2007142436 A5 JP 2007142436A5 JP 2006313358 A JP2006313358 A JP 2006313358A JP 2006313358 A JP2006313358 A JP 2006313358A JP 2007142436 A5 JP2007142436 A5 JP 2007142436A5
- Authority
- JP
- Japan
- Prior art keywords
- film
- metal film
- pad electrode
- alignment mark
- passivation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims 27
- 239000004065 semiconductor Substances 0.000 claims 17
- 238000002161 passivation Methods 0.000 claims 13
- 230000004888 barrier function Effects 0.000 claims 8
- 239000011229 interlayer Substances 0.000 claims 4
- 239000000758 substrate Substances 0.000 claims 4
- 229920001721 polyimide Polymers 0.000 claims 3
- 230000001681 protective effect Effects 0.000 claims 3
- 239000000463 material Substances 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020050111994A KR100660893B1 (ko) | 2005-11-22 | 2005-11-22 | 정렬 마크막을 구비하는 반도체 소자 및 그 제조 방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007142436A JP2007142436A (ja) | 2007-06-07 |
| JP2007142436A5 true JP2007142436A5 (enExample) | 2010-01-14 |
Family
ID=37815395
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006313358A Pending JP2007142436A (ja) | 2005-11-22 | 2006-11-20 | 整列マーク膜を備える半導体素子及びその製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7482703B2 (enExample) |
| JP (1) | JP2007142436A (enExample) |
| KR (1) | KR100660893B1 (enExample) |
| CN (1) | CN1971903B (enExample) |
| DE (1) | DE102006056066A1 (enExample) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8492263B2 (en) | 2007-11-16 | 2013-07-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Protected solder ball joints in wafer level chip-scale packaging |
| US20090174069A1 (en) * | 2008-01-04 | 2009-07-09 | National Semiconductor Corporation | I/o pad structure for enhancing solder joint reliability in integrated circuit devices |
| KR20090095076A (ko) * | 2008-03-04 | 2009-09-09 | 삼성전자주식회사 | 반도체 집적 회로 장치 및 그 제조 방법 |
| JP2010021293A (ja) * | 2008-07-09 | 2010-01-28 | Nec Electronics Corp | 半導体装置および半導体装置の製造方法 |
| CN101789391B (zh) * | 2009-01-23 | 2012-08-22 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
| JP2010225934A (ja) * | 2009-03-24 | 2010-10-07 | Mitsumi Electric Co Ltd | ウエハの製造方法 |
| US8299616B2 (en) * | 2010-01-29 | 2012-10-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | T-shaped post for semiconductor devices |
| US8803319B2 (en) | 2010-02-11 | 2014-08-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pillar structure having a non-planar surface for semiconductor devices |
| US8318596B2 (en) * | 2010-02-11 | 2012-11-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pillar structure having a non-planar surface for semiconductor devices |
| CN102157497B (zh) * | 2011-01-26 | 2016-03-09 | 上海华虹宏力半导体制造有限公司 | 多层堆栈的半导体器件的结构及形成方法 |
| DE102011005642B4 (de) | 2011-03-16 | 2012-09-27 | GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG | Verfahren zum Schutz von reaktiven Metalloberflächen von Halbleiterbauelementen während des Transports durch Bereitstellen einer zusätzlichen Schutzschicht |
| JP2013004572A (ja) * | 2011-06-13 | 2013-01-07 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| US9230932B2 (en) | 2012-02-09 | 2016-01-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect crack arrestor structure and methods |
| US9515036B2 (en) | 2012-04-20 | 2016-12-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for solder connections |
| CN103682085B (zh) * | 2012-09-20 | 2016-08-03 | 中芯国际集成电路制造(上海)有限公司 | 一种磁随机存取存储器及其制造方法 |
| CN103199084B (zh) * | 2013-03-08 | 2015-10-14 | 京东方科技集团股份有限公司 | 基板对位标记、基板及基板对位标记的制作方法 |
| US8987922B2 (en) * | 2013-03-11 | 2015-03-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for wafer level packaging |
| US9355979B2 (en) | 2013-08-16 | 2016-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Alignment structures and methods of forming same |
| CN104091808B (zh) * | 2014-06-25 | 2016-08-17 | 合肥鑫晟光电科技有限公司 | 阵列基板及其制作方法和显示装置 |
| US9505609B2 (en) * | 2015-04-29 | 2016-11-29 | Invensense, Inc. | CMOS-MEMS integrated device with selective bond pad protection |
| US9935047B2 (en) * | 2015-10-16 | 2018-04-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding structures and methods forming the same |
| US10658318B2 (en) * | 2016-11-29 | 2020-05-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | Film scheme for bumping |
| KR101902566B1 (ko) | 2017-07-25 | 2018-09-28 | 엘지디스플레이 주식회사 | 발광 표시 장치 및 이의 제조 방법 |
| US11694967B2 (en) * | 2019-03-14 | 2023-07-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of fabricating the same |
| CN114093842A (zh) * | 2020-12-23 | 2022-02-25 | 矽磐微电子(重庆)有限公司 | 裸片及其制作方法、芯片封装结构及其制作方法 |
| US20230317648A1 (en) * | 2022-03-04 | 2023-10-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor Devices and Methods of Manufacture |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03105937A (ja) * | 1989-09-19 | 1991-05-02 | Nec Corp | 半導体装置 |
| JPH0488622A (ja) * | 1990-08-01 | 1992-03-23 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH0590325A (ja) * | 1991-09-27 | 1993-04-09 | Toshiba Corp | 半導体装置のボンデイングパツド |
| KR100258719B1 (ko) | 1993-04-16 | 2000-06-15 | 손욱 | 칩온 글래스용 패널구조 |
| KR960008978A (ko) * | 1994-08-02 | 1996-03-22 | 김주용 | 반도체 소자의 정렬 마크 보호방법 |
| JP3256391B2 (ja) * | 1994-11-28 | 2002-02-12 | キヤノン株式会社 | 回路基板構造 |
| US6875681B1 (en) * | 1997-12-31 | 2005-04-05 | Intel Corporation | Wafer passivation structure and method of fabrication |
| JP4037561B2 (ja) * | 1999-06-28 | 2008-01-23 | 株式会社東芝 | 半導体装置の製造方法 |
| US6586323B1 (en) * | 2000-09-18 | 2003-07-01 | Taiwan Semiconductor Manufacturing Company | Method for dual-layer polyimide processing on bumping technology |
| US6465898B1 (en) * | 2001-07-23 | 2002-10-15 | Texas Instruments Incorporated | Bonding alignment mark for bonds over active circuits |
| JP2004319549A (ja) | 2003-04-11 | 2004-11-11 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| JP2005012065A (ja) * | 2003-06-20 | 2005-01-13 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| JP2005044971A (ja) | 2003-07-28 | 2005-02-17 | Sharp Corp | 半導体装置及びその製造方法 |
| JP2005109145A (ja) * | 2003-09-30 | 2005-04-21 | Toshiba Corp | 半導体装置 |
| US7122458B2 (en) * | 2004-07-22 | 2006-10-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for fabricating pad redistribution layer |
| KR100577308B1 (ko) * | 2004-12-29 | 2006-05-10 | 동부일렉트로닉스 주식회사 | 반도체 소자 및 그의 제조 방법 |
| KR100712289B1 (ko) * | 2005-04-07 | 2007-04-27 | 삼성에스디아이 주식회사 | 평판표시장치 및 그의 제조방법 |
-
2005
- 2005-11-22 KR KR1020050111994A patent/KR100660893B1/ko not_active Expired - Fee Related
-
2006
- 2006-06-23 US US11/473,852 patent/US7482703B2/en active Active
- 2006-11-20 JP JP2006313358A patent/JP2007142436A/ja active Pending
- 2006-11-20 DE DE102006056066A patent/DE102006056066A1/de not_active Withdrawn
- 2006-11-22 CN CN2006101486633A patent/CN1971903B/zh active Active
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