CN114093842A - 裸片及其制作方法、芯片封装结构及其制作方法 - Google Patents
裸片及其制作方法、芯片封装结构及其制作方法 Download PDFInfo
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- CN114093842A CN114093842A CN202011540576.9A CN202011540576A CN114093842A CN 114093842 A CN114093842 A CN 114093842A CN 202011540576 A CN202011540576 A CN 202011540576A CN 114093842 A CN114093842 A CN 114093842A
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Abstract
本发明提供了一种裸片及其制作方法、以及芯片封装结构及其制作方法,裸片包括:铝焊垫、钝化层以及铜层;铝焊垫与钝化层位于裸片的活性面,钝化层具有第一开口,第一开口暴露铝焊垫的部分区域;铜层覆盖于铝焊垫的部分区域,铜层的边界与位于第一开口的边界的钝化层之间具有间距。在铝焊垫的部分区域上形成铜层,且铜层的边界与钝化层之间具有间距,使得铜层完全位于钝化层的开口内,相对于铜层部分区域位于钝化层上,可避免铜层与钝化层的结合性能差导致铜层从钝化层上剥离;第二方面,铜层能防止铝焊垫表面氧化,降低铝焊垫的电阻;第三方面,采用激光开孔法在塑封层内形成开孔时,铜层可避免激光能量过大击穿铝焊垫,从而提升封装结构的良率。
Description
技术领域
本发明涉及芯片封装技术领域,尤其涉及一种裸片及其制作方法、芯片封装结构及其制作方法。
背景技术
近年来,随着电路集成技术的不断发展,电子产品越来越向小型化、智能化、高集成度、高性能以及高可靠性方向发展。封装技术不但制约产品的小型化,而且还影响产品的性能。
有鉴于此,本发明提供一种新的裸片及其制作方法、芯片封装结构及其制作方法,以提升封装结构的良率。
发明内容
本发明的发明目的是提供一种裸片及其制作方法、芯片封装结构及其制作方法,以提升封装结构的良率。
为实现上述目的,本发明的第一方面提供一种裸片,包括:
铝焊垫与钝化层,位于裸片的活性面,所述钝化层具有第一开口,所述第一开口暴露所述铝焊垫的部分区域;
铜层,覆盖于所述铝焊垫的部分区域,所述铜层的边界与位于所述第一开口的边界的所述钝化层之间具有间距。
可选地,所述铜层边界与位于所述第一开口边界的所述钝化层之间的间距的范围为:3μm~10μm。
本发明的第二方面提供一种裸片的制作方法,包括:
提供晶圆,所述晶圆包括钝化层与多个铝焊垫,所述钝化层与所述多个铝焊垫位于所述晶圆的活性面,所述钝化层具有多个第一开口,所述第一开口暴露所述铝焊垫的部分区域;
在所述钝化层与所述多个铝焊垫上形成图形化的掩膜层,所述图形化的掩膜层具有第二开口,所述第二开口暴露所述铝焊垫的部分区域,且所述图形化的掩膜层完全包覆所述钝化层;
去除所述铝焊垫上的氧化层,在所述第二开口内形成铜层;去除所述图形化的掩膜层;
切割所述晶圆形成多个裸片。
可选地,所述图形化的掩膜层的材料为感光膜,形成所述图形化的掩膜层步骤前,采用氧气等离子体或氩气等离子体轰击所述钝化层。
可选地,去除所述铝焊垫上的氧化层通过微蚀法实现。
可选地,在所述第二开口内形成铜层通过无极电镀法形成。
可选地,所述无极电镀法包括:先在所述第二开口内无极电镀锌层,所述锌层置换铜离子溶液中的铜,形成铜层。
本发明的第三方面提供一种芯片封装结构,包括:
上述任一项所述的裸片;
包覆所述裸片的塑封层;
引脚,位于所述塑封层上,所述引脚填充位于所述塑封层内的通孔以与所述铜层连接。
可选地,所述芯片封装结构还包括:再布线层,位于所述塑封层上,所述再布线层填充位于所述塑封层内的通孔以与所述铜层连接;所述引脚位于所述再布线层上。
本发明的第四方面提供一种芯片封装结构的制作方法,包括:
提供根据上述任一项所述的制作方法制作的裸片,形成包覆所述裸片的塑封层;
采用激光开孔法在所述塑封层内形成通孔,以暴露所述铜层;
在所述塑封层与所述铜层上形成引脚;
切割形成芯片封装结构。
可选地,形成所述塑封层步骤中,所述塑封层包覆多个所述裸片;切割步骤中,每个所述芯片封装结构包括一个所述裸片。
可选地,形成所述引脚步骤前,在所述塑封层与所述铜层上形成再布线层;所述引脚形成在所述再布线层上。
与现有技术相比,本发明的有益效果在于:
在铝焊垫的部分区域上形成铜层,且铜层的边界与钝化层之间具有间距,使得一方面,铜层完全位于钝化层的开口内,相对于铜层部分区域位于钝化层上的方案,可避免铜层与钝化层的结合性能差导致铜层从钝化层上剥离;第二方面,铜层能防止铝焊垫表面氧化,降低铝焊垫的电阻;第三方面,采用激光开孔法在塑封层内形成开孔时,铜层可避免激光能量过大击穿铝焊垫,从而提升工艺窗口及封装结构的良率。
附图说明
图1是本发明第一实施例的裸片的制作方法的流程图;
图2至图6是图1中的流程对应的中间结构示意图;
图7是本发明第一实施例的裸片的截面结构示意图;
图8是本发明第二实施例的芯片封装结构的制作方法的流程图;
图9至图13是图8中的流程对应的中间结构示意图;
图14是本发明第二实施例的芯片封装结构的截面结构示意图;
图15是本发明第三实施例的芯片封装结构的截面结构示意图;
图16是对照芯片封装结构的截面结构示意图。
为方便理解本发明,以下列出本发明中出现的所有附图标记:
晶圆11 钝化层111
铝焊垫112 晶圆的活性面11a
第一开口111a 图形化的掩膜层20
第二开口20a 铜层113
裸片1 裸片的活性面1a
塑封层21 塑封层正面21a
塑封层背面21b 载板2
通孔211 引脚22
再布线层23 介电层24
芯片封装结构3、4
具体实施方式
为使本发明的上述目的、特征和优点能够更为明显易懂,下面结合附图对本发明的具体实施例做详细的说明。
图1是本发明第一实施例的裸片的制作方法的流程图。图2至图6是图1中的流程对应的中间结构示意图;图7是本发明第一实施例的裸片的截面结构示意图。
首先,参照图1中的步骤S1、图2与图3所示,图2是晶圆的俯视图,图3是沿着图2中的AA线的剖视图,提供晶圆11,晶圆11包括钝化层111与多个铝焊垫112,钝化层111与多个铝焊垫112位于晶圆11的活性面11a,钝化层111具有多个第一开口111a,第一开口111a暴露铝焊垫112的部分区域。
参照图2所示,晶圆11可以包括阵列式排布的多个区域,每个区域内可以包含形成于半导体衬底上的多种器件,以及与各个器件电连接的电互连结构。铝焊垫112与电互连结构连接,用于将各个器件的电信号输入/输出。
铝焊垫112的厚度可以小于3μm,更具体地,可以小于1μm。
钝化层111的材料可以为氮化硅等致密材料,以隔绝外界水汽、氧等进入半导体衬底上的器件。
钝化层111内的第一开口111a可以通过干法刻蚀法或湿法刻蚀法形成。
接着,参照图1中的步骤S2与图4所示,在钝化层111与多个铝焊垫112上形成图形化的掩膜层20,图形化的掩膜层20具有第二开口20a,第二开口20a暴露铝焊垫112的部分区域,且图形化的掩膜层20完全包覆钝化层111。
图形化的掩膜层20的材料可以为光刻胶。一个可选方案中,形成的光刻胶层可为感光膜。感光膜可以从胶带上撕下,贴敷在钝化层111与多个铝焊垫112上。其它可选方案中,光刻胶层也可以采用先涂布液体光刻胶,后加热固化形成。此外,图形化的掩膜层20的材料也可以为介电材料,该介电材料与钝化层111的材料不同。例如钝化层111的材料为氮化硅时,图形化的掩膜层20的材料可以为二氧化硅。
图形化的掩膜层20完全包覆钝化层111意味着:第二开口20a的尺寸小于第一开口111a的尺寸,且第二开口20a的边界与第一开口111a的边界之间具有间距L。间距L的范围可以为:3μm~10μm。
需要说明的是,本实施例中的范围包括端点值。
之后,参照图1中的步骤S3、图4与图5所示,去除铝焊垫112上的氧化层,在第二开口20a内形成铜层113;参照图6所示,去除图形化的掩膜层20。
形成第一开口111a与第二开口20a后,铝焊垫112暴露在环境中,有可能被环境中的氧气氧化生成氧化铝层。氧化铝层的电阻远大于铝的电阻,因而会增加铝焊垫112的电阻。
去除铝焊垫112上的氧化层可避免增加铝焊垫112的电阻。
具体地,可以通过微蚀法实现去除铝焊垫112上的氧化层。微蚀法可以采用酸性腐蚀液与氧化层发生反应实现去除氧化层,酸性溶液例如为硫酸、盐酸、或硝酸等。
铜层113可以通过无极电镀法形成。
无极电镀是将溶液中的金属离子还原析出在待电镀件上形成金属层的方法。
无极电镀工艺中,a)将去除氧化层后的晶圆11置于铜离子溶液中,铝与铜离子发生置换反应,在铝焊垫112上析出铜层113。或b)将去除氧化层后的晶圆11先置于锌离子溶液中,铝与锌离子发生置换反应,在铝焊垫112上析出锌层;再将析出锌层后的晶圆11置于铜离子溶液中,锌与铜离子发生置换反应,在铝焊垫112上析出铜层113。相对于a)方案,b)方案的好处至少在于:锌层可修复铝焊垫112的粗糙表面,从而可形成平整度更高的铜层113。
铜层113的上表面可以高于或低于钝化层111的上表面。考虑到后续激光开孔工艺中的激光能量,铜层113优选较厚。
铜层113完全位于钝化层11的开口111a内,相对于铜层113部分区域位于钝化层111上的方案,可避免铜层113与钝化层111的结合性能差导致铜层113从钝化层111上剥离。
图形化的掩膜层20可采用针对性的方法去除,例如光刻胶可采用灰化法去除,感光膜可采用酸性溶液去除,二氧化硅可采用HF酸去除。
再接着,参照图1中的步骤S4、图6与图7所示,切割晶圆11形成多个裸片1。
晶圆11在切割前可以自背面减薄厚度,以降低裸片1的厚度。
参照图7所示,本实施例中的裸片1包括:
铝焊垫112与钝化层111,位于裸片1的活性面1a,钝化层111具有第一开口111a,第一开口111a暴露铝焊垫112的部分区域;
铜层113,覆盖于铝焊垫112的部分区域,铜层113的边界与位于第一开口111a的边界的钝化层111之间具有间距L。
间距L的范围可以为:3μm~10μm。
图8是本发明第二实施例的芯片封装结构的制作方法的流程图。图9至图13是图8中的流程对应的中间结构示意图;图14是本发明第二实施例的芯片封装结构的截面结构示意图。
首先,参照图8中的步骤S5、图9与图10所示,提供参照图1中的步骤S1~S4制作的裸片1,形成包覆裸片1的塑封层21。
为提高封装效率,本步骤可以提供多个裸片1。各个的裸片1的功能可以相同,也可以不同。
裸片1可以为电力裸片(POWER DIE)、存储裸片(MEMORY DIE)、传感裸片(SENSORDIE)、或射频裸片(RADIO FREQUENCE DIE)等,本实施例不限定裸片1的功能。
具体地,形成包覆裸片1的塑封层21步骤可以包括:参照图9所示,将多个裸片1固定于载板2,裸片1的活性面1a远离载板2;在载板2的表面形成包埋各个裸片1的塑封层21。
载板2为硬质板件,可以包括玻璃板、陶瓷板、金属板等。
裸片1与载板2之间可以设置粘结层,以此实现两者之间的固定。具体地,可以在载板2表面涂布一整面粘结层,将多个裸片1置于该粘结层上。粘结层可以采用易剥离的材料,以便将载板2剥离下来,例如可以采用通过加热能够使其失去粘性的热分离材料或通过紫外照射能够使其失去粘性的UV分离材料。
塑封层21的材料可以为环氧树脂、聚酰亚胺树脂、苯并环丁烯树脂、聚苯并恶唑树脂、聚对苯二甲酸丁二酯、聚碳酸酯、聚对苯二甲酸乙二醇酯、聚乙烯、聚丙烯、聚烯烃、聚氨酯、聚烯烃、聚醚砜、聚酰胺、聚亚氨酯、乙烯-醋酸乙烯共聚物或聚乙烯醇等。塑封层21还可以为各种聚合物、树脂或者树脂、聚合物复合材料,例如具有填充物或玻璃纤维布(glassfiber)的树脂,或者其它具有类似特性的材料。对应地,封装可以采用在各个裸片1之间填充液态塑封料、后经塑封模具高温固化进行。一些实施例中,塑封层21也可以采用热压成型、传递成型等塑性材料成型的方式成型。
塑封层21可以包括相对的正面21a与背面21b。
参照图10所示,可以自背面21b减薄塑封层21,可采用机械研磨例如采用砂轮研磨,以减小芯片封装结构3(参照图14所示)的厚度。
之后,参照图8中的步骤S6与图11所示,采用激光开孔法在塑封层21内形成通孔211,以暴露铜层113。
相关激光开孔工艺中,为确保铝焊垫112完全露出,避免铝焊垫112上的塑封层21残留导致开路,能量一般选择较大,但能量较大,又会击穿铝焊垫112,造成铝焊垫112的电连接可靠性变差。本实施例中,铝焊垫112上设置铜层113,铜层113可避免激光能量过大击穿铝焊垫112;另一方面,铜层113还能防止铝焊垫112的表面氧化,上述氧化会增大铝焊垫112的电阻。
铜层113优选较厚,确保激光开孔工艺中不会击穿铝焊垫112。
通孔211的底部尺寸小于铜层113的尺寸。通孔211的底部尺寸小于顶部尺寸。实际工艺中,通孔211的底部尺寸一般大于顶部尺寸的75%,一般不小于60%。
再接着,参照图8中的步骤S7与图12所示,在塑封层21与铜层113上形成引脚22。
本实施例中,形成引脚22包括如下步骤S71~S74。
步骤S71:在铜层113与塑封层21的背面21b上形成光刻胶层。
本步骤S71中,一个可选方案中,形成的光刻胶层可为感光膜。感光膜可以从胶带上撕下,贴敷在铜层113与塑封层21的背面21b上。其它可选方案中,光刻胶层也可以采用先涂布液体光刻胶,后加热固化形成。
步骤S72:曝光显影光刻胶层,保留第一预定区域的光刻胶层,第一预定区域与待形成的引脚22所在区域互补。
本步骤S72对光刻胶层进行了图案化。其它可选方案中,也可以使用其它易去除的牺牲材料代替光刻胶层。
步骤S73:在第一预定区域的互补区域填充金属层以形成引脚22。
本步骤S73可以采用电镀工艺完成。电镀铜或铝的工艺较为成熟。
具体地,步骤S71形成光刻胶层之前,可以先通过物理气相沉积法或化学气相沉积法在铜层113与塑封层21的背面21b上形成一层籽晶层(Seed Layer)。籽晶层可以作为电镀铜或铝的供电层。
电镀法可以包括电解电镀法或无极电镀法。电解电镀法是将待电镀件作为阴极,对电解液进行电解,从而在待电镀件上形成一层金属。无极电镀法是将溶液中的金属离子还原析出在待电镀件上形成金属层的方法。一些实施例中,还可以采用先溅射、后刻蚀的方法形成引脚22。
步骤S74:灰化去除第一预定区域剩余的光刻胶层。
灰化完后,通过干法刻蚀或湿法刻蚀去除第一预定区域的籽晶层。
之后,参照图8中的步骤S8、图13与图14所示,切割形成芯片封装结构3。
参照图13所示,切割前,先去除载板2。
载板2的去除方式可以为激光剥离、UV照射等现有去除方式。
参照图14所示,当塑封层21包覆多个裸片1时,切割后,每个芯片封装结构3中包含一个裸片1。
参照图14所示,本实施例中的芯片封装结构3包括:
裸片1;
包覆裸片1的塑封层21;
引脚22,位于塑封层21上,引脚22填充位于塑封层21内的通孔211以与铜层113连接。
图15是本发明第三实施例的芯片封装结构的截面结构示意图。参照图15所示,本实施例中的芯片封装结构4与图14中的芯片封装结构3大致相同,区别仅在于:还包括再布线层23,再布线层23位于塑封层21上,再布线层23填充位于塑封层21内的通孔211以与铜层113电连接;引脚22位于再布线层23上。
再布线层23通过铜层113可与部分数目的铝焊垫112选择性电互连,可实现更复杂的电路布局。
再布线层23与引脚22上可以包覆有介电层24,引脚22暴露在介电层24外。
一些实施例中,再布线层23还可以包括两层及其以上。
图16是对照芯片封装结构的截面结构示意图。需要说明的是,当芯片封装结构4中的裸片1包含高频器件时,高频下,电流具有趋肤效应。若铝焊垫112的上表面为凹凸不平的粗糙表面,则直接在铝焊垫112上形成铜层113时,铜层113的上表面也为凹凸不平的粗糙表面,再布线层23对应铜层113区域也为凹凸不平的粗糙表面。电流I流经再布线层23的上述粗糙表面会增加能耗。
参照图15所示,形成铜层113前,若对铝焊垫112的的粗糙表面进行修复,形成平坦表面,则铜层113的上表面也为平坦表面,再布线层23对应铜层113区域也为平坦表面。电流流经再布线层23的上述平坦表面会降低能耗。
上述修复方法可参照无极电镀工艺中的b)方案,使用锌层修复。
相应地,对于制作方法,本实施例与图8中的芯片封装结构的制作方法的区别仅在于:步骤S7形成引脚22步骤前,在塑封层21与铜层113上形成再布线层23;引脚22形成在再布线层23上。
形成再布线层23的工艺可以参照引脚22的形成工艺。
虽然本发明披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。
Claims (12)
1.一种裸片,其特征在于,包括:
铝焊垫与钝化层,位于裸片的活性面,所述钝化层具有第一开口,所述第一开口暴露所述铝焊垫的部分区域;
铜层,覆盖于所述铝焊垫的部分区域,所述铜层的边界与位于所述第一开口的边界的所述钝化层之间具有间距。
2.根据权利要求1所述的裸片,其特征在于,所述铜层边界与位于所述第一开口边界的所述钝化层之间的间距的范围为:3μm~10μm。
3.一种裸片的制作方法,其特征在于,包括:
提供晶圆,所述晶圆包括钝化层与多个铝焊垫,所述钝化层与所述多个铝焊垫位于所述晶圆的活性面,所述钝化层具有多个第一开口,所述第一开口暴露所述铝焊垫的部分区域;
在所述钝化层与所述多个铝焊垫上形成图形化的掩膜层,所述图形化的掩膜层具有第二开口,所述第二开口暴露所述铝焊垫的部分区域,且所述图形化的掩膜层完全包覆所述钝化层;
去除所述铝焊垫上的氧化层,在所述第二开口内形成铜层;去除所述图形化的掩膜层;
切割所述晶圆形成多个裸片。
4.根据权利要求3所述的裸片的制作方法,其特征在于,所述图形化的掩膜层的材料为感光膜,形成所述图形化的掩膜层步骤前,采用氧气等离子体或氩气等离子体轰击所述钝化层。
5.根据权利要求3所述的裸片的制作方法,其特征在于,去除所述铝焊垫上的氧化层通过微蚀法实现。
6.根据权利要求3所述的裸片的制作方法,其特征在于,在所述第二开口内形成铜层通过无极电镀法形成。
7.根据权利要求6所述的裸片的制作方法,其特征在于,所述无极电镀法包括:先在所述第二开口内无极电镀锌层,所述锌层置换铜离子溶液中的铜,形成铜层。
8.一种芯片封装结构,其特征在于,包括:
权利要求1或2所述的裸片;
包覆所述裸片的塑封层;
引脚,位于所述塑封层上,所述引脚填充位于所述塑封层内的通孔以与所述铜层连接。
9.根据权利要求8所述的芯片封装结构,其特征在于,还包括:再布线层,位于所述塑封层上,所述再布线层填充位于所述塑封层内的通孔以与所述铜层连接;所述引脚位于所述再布线层上。
10.一种芯片封装结构的制作方法,其特征在于,包括:
提供根据权利要求3至7任一项所述的制作方法制作的裸片,形成包覆所述裸片的塑封层;
采用激光开孔法在所述塑封层内形成通孔,以暴露所述铜层;
在所述塑封层与所述铜层上形成引脚;
切割形成芯片封装结构。
11.根据权利要求10所述的芯片封装结构的制作方法,其特征在于,形成所述塑封层步骤中,所述塑封层包覆多个所述裸片;切割步骤中,每个所述芯片封装结构包括一个所述裸片。
12.根据权利要求10所述的芯片封装结构的制作方法,其特征在于,形成所述引脚步骤前,在所述塑封层与所述铜层上形成再布线层;所述引脚形成在所述再布线层上。
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