JP2006210607A5 - - Google Patents
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- Publication number
- JP2006210607A5 JP2006210607A5 JP2005020111A JP2005020111A JP2006210607A5 JP 2006210607 A5 JP2006210607 A5 JP 2006210607A5 JP 2005020111 A JP2005020111 A JP 2005020111A JP 2005020111 A JP2005020111 A JP 2005020111A JP 2006210607 A5 JP2006210607 A5 JP 2006210607A5
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- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005020111A JP4693428B2 (ja) | 2005-01-27 | 2005-01-27 | 半導体集積回路 |
| TW095100837A TW200644161A (en) | 2005-01-27 | 2006-01-10 | Semiconductor integrated circuit having layout in which buffers or protection circuits are arranged in concentrated manner |
| US11/328,194 US7358548B2 (en) | 2005-01-27 | 2006-01-10 | Semiconductor integrated circuit having layout in which buffers or protection circuits are arranged in concentrated manner |
| KR1020060008212A KR20060086880A (ko) | 2005-01-27 | 2006-01-26 | 반도체 집적 회로 |
| CNB2006100024302A CN100536133C (zh) | 2005-01-27 | 2006-01-27 | 具有集中地配置了缓冲器或保护电路的布局的半导体集成电路 |
| US12/071,624 US20080149966A1 (en) | 2005-01-27 | 2008-02-25 | Semiconductor integrated circuit having layout in which buffers or protection circuits are arranged in concentrated manner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005020111A JP4693428B2 (ja) | 2005-01-27 | 2005-01-27 | 半導体集積回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006210607A JP2006210607A (ja) | 2006-08-10 |
| JP2006210607A5 true JP2006210607A5 (enExample) | 2008-02-14 |
| JP4693428B2 JP4693428B2 (ja) | 2011-06-01 |
Family
ID=36695849
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005020111A Expired - Fee Related JP4693428B2 (ja) | 2005-01-27 | 2005-01-27 | 半導体集積回路 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US7358548B2 (enExample) |
| JP (1) | JP4693428B2 (enExample) |
| KR (1) | KR20060086880A (enExample) |
| CN (1) | CN100536133C (enExample) |
| TW (1) | TW200644161A (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4693428B2 (ja) * | 2005-01-27 | 2011-06-01 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
| TWI381385B (zh) * | 2007-05-04 | 2013-01-01 | Macronix Int Co Ltd | 具有嵌入式多類型記憶體的記憶體結構 |
| KR100798896B1 (ko) * | 2007-06-07 | 2008-01-29 | 주식회사 실리콘웍스 | 반도체 칩의 패드 배치 구조 |
| US8138787B2 (en) * | 2008-07-13 | 2012-03-20 | Altera Corporation | Apparatus and method for input/output module that optimizes frequency performance in a circuit |
| JP5419431B2 (ja) * | 2008-11-28 | 2014-02-19 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| JP5503208B2 (ja) | 2009-07-24 | 2014-05-28 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2017135308A (ja) * | 2016-01-29 | 2017-08-03 | セイコーエプソン株式会社 | 半導体集積回路装置及びそのレイアウト設計方法、並びに、電子機器 |
| WO2021143050A1 (zh) * | 2020-01-14 | 2021-07-22 | 长鑫存储技术有限公司 | 集成电路结构和存储器 |
| US11367478B2 (en) | 2020-01-14 | 2022-06-21 | Changxin Memory Technologies, Inc. | Integrated circuit structure and memory |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4454591A (en) * | 1980-05-29 | 1984-06-12 | Texas Instruments Incorporated | Interface system for bus line control |
| US5300796A (en) * | 1988-06-29 | 1994-04-05 | Hitachi, Ltd. | Semiconductor device having an internal cell array region and a peripheral region surrounding the internal cell array for providing input/output basic cells |
| JPH08125130A (ja) | 1994-10-26 | 1996-05-17 | Matsushita Electric Ind Co Ltd | 半導体集積回路 |
| JPH09232437A (ja) * | 1996-02-27 | 1997-09-05 | Hitachi Ltd | 半導体集積回路装置およびそれを用いたコンピュータシステム |
| JP3380465B2 (ja) * | 1998-06-29 | 2003-02-24 | 松下電器産業株式会社 | 半導体装置 |
| JP3374967B2 (ja) * | 1998-10-26 | 2003-02-10 | 日本電気株式会社 | 半導体集積回路 |
| JP2002050742A (ja) * | 2000-07-31 | 2002-02-15 | Nec Corp | 半導体装置およびその製造方法 |
| JP4904619B2 (ja) * | 2000-11-29 | 2012-03-28 | 富士通セミコンダクター株式会社 | 半導体装置 |
| US6502231B1 (en) * | 2001-05-31 | 2002-12-31 | Applied Micro Circuits Corporation | Integrated circuit template cell system and method |
| JP2003158195A (ja) * | 2001-11-20 | 2003-05-30 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| DE10220923B4 (de) * | 2002-05-10 | 2006-10-26 | Infineon Technologies Ag | Verfahren zur Herstellung eines nicht-flüchtigen Flash-Halbleiterspeichers |
| US6735108B2 (en) * | 2002-07-08 | 2004-05-11 | Micron Technology, Inc. | ROM embedded DRAM with anti-fuse programming |
| US7003750B2 (en) * | 2002-08-01 | 2006-02-21 | Sun Microsystems, Inc. | Topology based wire shielding generation |
| JP4190865B2 (ja) * | 2002-11-11 | 2008-12-03 | Ｎｅｃエレクトロニクス株式会社 | 半導体メモリ |
| JP4624660B2 (ja) * | 2003-10-09 | 2011-02-02 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7006370B1 (en) * | 2003-11-18 | 2006-02-28 | Lsi Logic Corporation | Memory cell architecture |
| JP4693428B2 (ja) * | 2005-01-27 | 2011-06-01 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
-
2005
- 2005-01-27 JP JP2005020111A patent/JP4693428B2/ja not_active Expired - Fee Related
-
2006
- 2006-01-10 TW TW095100837A patent/TW200644161A/zh unknown
- 2006-01-10 US US11/328,194 patent/US7358548B2/en not_active Expired - Fee Related
- 2006-01-26 KR KR1020060008212A patent/KR20060086880A/ko not_active Ceased
- 2006-01-27 CN CNB2006100024302A patent/CN100536133C/zh not_active Expired - Fee Related
-
2008
- 2008-02-25 US US12/071,624 patent/US20080149966A1/en not_active Abandoned