JP2006048688A - セグメント・レベルの予備化を実現するシステム、方法、およびプログラム - Google Patents
セグメント・レベルの予備化を実現するシステム、方法、およびプログラム Download PDFInfo
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- JP2006048688A JP2006048688A JP2005220421A JP2005220421A JP2006048688A JP 2006048688 A JP2006048688 A JP 2006048688A JP 2005220421 A JP2005220421 A JP 2005220421A JP 2005220421 A JP2005220421 A JP 2005220421A JP 2006048688 A JP2006048688 A JP 2006048688A
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- Prior art keywords
- memory
- bus
- segment
- bits
- upstream
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Classifications
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
- G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
- G06F11/201—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media between storage system components
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/104—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error using arithmetic codes, i.e. codes which are preserved during operation, e.g. modulo 9 or 11 check
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/903,188 US7539800B2 (en) | 2004-07-30 | 2004-07-30 | System, method and storage medium for providing segment level sparing |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006048688A true JP2006048688A (ja) | 2006-02-16 |
| JP2006048688A5 JP2006048688A5 (enExample) | 2008-07-10 |
Family
ID=35311880
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005220421A Pending JP2006048688A (ja) | 2004-07-30 | 2005-07-29 | セグメント・レベルの予備化を実現するシステム、方法、およびプログラム |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7539800B2 (enExample) |
| EP (1) | EP1622020B1 (enExample) |
| JP (1) | JP2006048688A (enExample) |
| KR (1) | KR100843538B1 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012527661A (ja) * | 2009-05-22 | 2012-11-08 | モサイド・テクノロジーズ・インコーポレーテッド | 設定可能モジュールおよびメモリサブシステム |
| JP2021510897A (ja) * | 2018-01-19 | 2021-04-30 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | メモリ・システム内のビットの効率的かつ選択的スペアリング |
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| US20060036827A1 (en) | 2006-02-16 |
| US7539800B2 (en) | 2009-05-26 |
| EP1622020B1 (en) | 2014-02-26 |
| EP1622020A3 (en) | 2008-09-10 |
| KR20060049975A (ko) | 2006-05-19 |
| KR100843538B1 (ko) | 2008-07-04 |
| EP1622020A2 (en) | 2006-02-01 |
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