JP2005197638A - 高周波半導体装置及びその製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 57
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 235000012431 wafers Nutrition 0.000 claims description 54
- 238000000034 method Methods 0.000 claims description 34
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000002184 metal Substances 0.000 claims description 21
- 238000005240 physical vapour deposition Methods 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 230000004888 barrier function Effects 0.000 claims description 7
- 238000009792 diffusion process Methods 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 6
- 229910010037 TiAlN Inorganic materials 0.000 claims description 4
- 229910008482 TiSiN Inorganic materials 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 4
- QRXWMOHMRWLFEY-UHFFFAOYSA-N isoniazide Chemical compound NNC(=O)C1=CC=NC=C1 QRXWMOHMRWLFEY-UHFFFAOYSA-N 0.000 claims description 4
- 238000000227 grinding Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 229910004200 TaSiN Inorganic materials 0.000 claims description 2
- 238000000231 atomic layer deposition Methods 0.000 claims description 2
- 238000007772 electroless plating Methods 0.000 claims description 2
- 238000009713 electroplating Methods 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 abstract description 10
- 238000005516 engineering process Methods 0.000 description 10
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 4
- 230000010354 integration Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000004377 microelectronic Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
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Abstract
【解決手段】第1半導体基板に貫通するビアホールプラグを含むインダクタが形成された第1ウェーハと、第2半導体基板に論理素子が形成され、上面にインダクタ連結配線が形成された第2ウェーハとを含んでなり、第1ウェーハを第2ウェーハ上に接合させてビアコンタクトプラグとインダクタ連結配線とが電気的に連結された構成を有する。
【選択図】図5
Description
12 大型垂直ビアホール
13 絶縁層
14 フォトレジスト層
14P フォトレジストパターン
15 ダマシンパターン
16 拡散障壁層
17 シード層
18 インダクタ
19 ビアコンタクトプラグ
21 第2半導体基板
22 素子分離膜
23 PMOSトランジスタ
24 NMOSトランジスタ
25〜29 第1〜第5金属配線
30 インダクタ連結配線
100 第1ウェーハ
200 第2ウェーハ
Claims (9)
- 第1半導体基板に貫通するビアホールプラグを含むインダクタが形成された第1ウェーハと、
第2半導体基板に論理素子が形成され、上面にインダクタ連結配線が形成された第2ウェーハとを含んでなり、
前記第1ウェーハを前記第2ウェーハ上に接合させてビアコンタクトプラグと前記インダクタ連結配線とが電気的に連結された構成を有する高周波半導体装置。 - 第1半導体基板に大型垂直ビアホールを形成する段階と、
前記ビアホールの形成された全体上部の表面に沿って絶縁層を形成する段階と、
前記絶縁層上にフォトレジスト層を形成した後パターニングして、フォトレジストパターンによって定義される前記ビアホールを含むダマシンパターンを形成する段階と、
前記ビアホール及び前記ダマシンパターンを含んだ全体構造上部の表面に沿って拡散障壁層及びシード層を順次形成する段階と、
前記ビアホール及び前記ダマシンパターン内に導電性物質を充填して前記第1半導体基板の前面にビアコンタクトプラグ及びこれを含むインダクタを形成する段階と、
バックサイドグラインディング工程を行うより、第1半導体基板の後面にビアコンタクトプラグの底面部が露出する第1ウェーハを製造する段階と、
第2半導体基板に多層金属配線構造の論理素子を形成する段階と、
前記金属配線を含んだ全体構造の上部にインダクタ連結配線を形成して第2ウェーハを製造する段階と、
前記第1ウェーハを前記第2ウェーハの上部に接合させる段階とを含む高周波半導体装置の製造方法。 - 前記大型垂直ビアホールは0.5〜50μmの直径と1〜300μmの深さを有する請求項2記載の高周波半導体装置の製造方法。
- 前記絶縁層はLTO又はHTOを用いて形成する請求項2記載の高周波半導体装置の製造方法。
- 前記拡散障壁層はionized PVD TiN、CVD TiN、MOCVD TiN、ionized PVD Ta、ionized PVD TaN、CVD Ta、CVD TaN、CVD WN、PVD TiAlN、PVD TiSiN、CVD TiAlN、CVD TiSiN及びCVD TaSiNよるなる群より選択されたいずれか一つを単独で或いは2つ以上を積層させて形成する請求項2記載の高周波半導体装置の製造方法。
- 前記シード層はCu、Ag、Au、Ti及びAlのいずれか一つをPVD法、CVD法、ALD法、電気メッキ法又は無電解メッキ法のいずれか一つの方法を用いて形成する請求項2記載の高周波半導体装置の製造方法。
- 前記導電性物質はCu、Al、Wのようなインダクタとして用いられる物質である請求項2記載の高周波半導体装置の製造方法。
- 前記第1ウェーハのビアコンタクトプラグと前記第2ウェーハのインダクタ連結配線が電気的に連結される請求項2記載の高周波半導体装置の製造方法。
- 前記接合工程は、ウェーハとウェーハとの間に100〜10000mbarの圧力を加えてAr、N2、H2+Ar又はH2+N2ガス雰囲気で1分〜2時間、200〜500℃の温度で熱処理する請求項2記載の高周波半導体装置の製造方法。
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KR1020030100166A KR100569590B1 (ko) | 2003-12-30 | 2003-12-30 | 고주파 반도체 장치 및 그 제조방법 |
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JP2005197638A true JP2005197638A (ja) | 2005-07-21 |
JP4664013B2 JP4664013B2 (ja) | 2011-04-06 |
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US (1) | US7037800B2 (ja) |
JP (1) | JP4664013B2 (ja) |
KR (1) | KR100569590B1 (ja) |
CN (1) | CN100337330C (ja) |
Cited By (8)
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JP2008053711A (ja) * | 2006-08-23 | 2008-03-06 | Dongbu Hitek Co Ltd | 半導体素子及びその製造方法 |
JP2009503809A (ja) * | 2005-06-14 | 2009-01-29 | キュービック・ウエハ・インコーポレーテッド | 背面対前面バイアプロセス |
JP2011114033A (ja) * | 2009-11-24 | 2011-06-09 | Panasonic Electric Works Co Ltd | トランス |
US8456015B2 (en) | 2005-06-14 | 2013-06-04 | Cufer Asset Ltd. L.L.C. | Triaxial through-chip connection |
KR20140100302A (ko) * | 2013-02-06 | 2014-08-14 | 삼성전자주식회사 | 관통 전극을 갖는 반도체 소자 및 그 형성 방법 |
US8846445B2 (en) | 2005-06-14 | 2014-09-30 | Cufer Asset Ltd. L.L.C. | Inverse chip connector |
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JP2008053711A (ja) * | 2006-08-23 | 2008-03-06 | Dongbu Hitek Co Ltd | 半導体素子及びその製造方法 |
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Also Published As
Publication number | Publication date |
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KR20050070527A (ko) | 2005-07-07 |
KR100569590B1 (ko) | 2006-04-10 |
US7037800B2 (en) | 2006-05-02 |
JP4664013B2 (ja) | 2011-04-06 |
CN1638124A (zh) | 2005-07-13 |
CN100337330C (zh) | 2007-09-12 |
US20050139954A1 (en) | 2005-06-30 |
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