JP2005197475A - 半導体装置のドライエッチング方法 - Google Patents
半導体装置のドライエッチング方法 Download PDFInfo
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- JP2005197475A JP2005197475A JP2004002408A JP2004002408A JP2005197475A JP 2005197475 A JP2005197475 A JP 2005197475A JP 2004002408 A JP2004002408 A JP 2004002408A JP 2004002408 A JP2004002408 A JP 2004002408A JP 2005197475 A JP2005197475 A JP 2005197475A
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- Prior art keywords
- trench
- semiconductor device
- oxide film
- manufacturing
- silicon
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- 238000000034 method Methods 0.000 title claims description 37
- 239000004065 semiconductor Substances 0.000 title claims description 13
- 238000001312 dry etching Methods 0.000 title claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 14
- 239000010703 silicon Substances 0.000 claims abstract description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 229910052786 argon Inorganic materials 0.000 claims abstract description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 14
- 230000003647 oxidation Effects 0.000 claims description 13
- 150000002500 ions Chemical class 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000005468 ion implantation Methods 0.000 claims description 7
- 229910052799 carbon Inorganic materials 0.000 claims description 2
- 229910052731 fluorine Inorganic materials 0.000 claims description 2
- 229910052734 helium Inorganic materials 0.000 claims description 2
- 229910052743 krypton Inorganic materials 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 229910052704 radon Inorganic materials 0.000 claims description 2
- 229910052724 xenon Inorganic materials 0.000 claims description 2
- 239000013078 crystal Substances 0.000 abstract description 12
- 230000007547 defect Effects 0.000 abstract description 12
- 230000015572 biosynthetic process Effects 0.000 abstract description 11
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 9
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 abstract description 3
- -1 Argon ions Chemical class 0.000 abstract 1
- 238000002955 isolation Methods 0.000 description 20
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 241000894007 species Species 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 238000000280 densification Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 241000293849 Cordylanthus Species 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 238000001994 activation Methods 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 230000005596 ionic collisions Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 238000009279 wet oxidation reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
【解決手段】面方位(100)のシリコン基板11にシリコン酸化膜12、シリコン窒化膜13を順次形成し、パターニングしたシリコン窒化膜13をマスクとして、トレンチ14を形成する。トレンチ14の内部の面方位(111)に垂直方向より、アルゴンをイオン注入し、その後、酸化膜形成をおこなう。
【選択図】 図5
Description
2、12 シリコン酸化膜
3、13 シリコン窒化膜
4、14 トレンチ
5、18 CVD酸化膜
15 アモルファス層
16 ライナー層
17 結晶欠陥
Claims (8)
- シリコン基板にドライエッチング法によりトレンチを形成する工程と、前記トレンチの底部にイオン種を注入する工程と、酸化処理を施すことにより前記トレンチ内部にシリコン酸化膜を形成することを特徴とする半導体装置の製造方法。
- 前記イオン種の注入後トレンチ内部にシリコン酸化膜が形成され、そして除去される工程がおこなわれることを特徴とする請求項1記載の半導体装置の製造方法。
- 前記シリコン基板は面方位(100)であることを特徴とする請求項1及び2記載の半導体装置の製造方法。
- 前記イオン種の注入は面方位(111)に垂直方向からおこなわれることを特徴とする請求項3記載の半導体装置の製造方法。
- 前記イオン種はシリコンに電気的に不活性であることを特徴とする請求項1乃至4の半導体装置の製造方法。
- 前記イオン種はHe,Ar,Kr、Xe,Rnのいずれかである請求項5記載の半導体装置の製造方法。
- 前記イオン注入の元素は酸化を増速させるイオン種である請求項5記載の半導体装置の製造方法。
- 前記イオン種はO,F,Cのいずれかである請求項7記載の半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004002408A JP2005197475A (ja) | 2004-01-07 | 2004-01-07 | 半導体装置のドライエッチング方法 |
US10/844,536 US7226846B2 (en) | 2004-01-07 | 2004-05-13 | Method of dry etching semiconductor substrate to reduce crystal defects in a trench |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004002408A JP2005197475A (ja) | 2004-01-07 | 2004-01-07 | 半導体装置のドライエッチング方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2005197475A true JP2005197475A (ja) | 2005-07-21 |
Family
ID=34709048
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004002408A Pending JP2005197475A (ja) | 2004-01-07 | 2004-01-07 | 半導体装置のドライエッチング方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7226846B2 (ja) |
JP (1) | JP2005197475A (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009283492A (ja) * | 2008-05-19 | 2009-12-03 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2009283494A (ja) * | 2008-05-19 | 2009-12-03 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2009283493A (ja) * | 2008-05-19 | 2009-12-03 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2017220673A (ja) * | 2017-07-24 | 2017-12-14 | ルネサスエレクトロニクス株式会社 | 撮像装置の製造方法および撮像装置 |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100707654B1 (ko) * | 2005-07-26 | 2007-04-13 | 동부일렉트로닉스 주식회사 | 반도체 장치의 소자 분리 구조 및 그 형성방법 |
US7645678B2 (en) * | 2007-02-13 | 2010-01-12 | United Microelectronics Corp. | Process of manufacturing a shallow trench isolation and process of treating bottom surface of the shallow trench for avoiding bubble defects |
US20090170331A1 (en) * | 2007-12-27 | 2009-07-02 | International Business Machines Corporation | Method of forming a bottle-shaped trench by ion implantation |
US20110115018A1 (en) * | 2009-11-13 | 2011-05-19 | Maxim Integrated Products, Inc. | Mos power transistor |
US8969958B1 (en) | 2009-11-13 | 2015-03-03 | Maxim Integrated Products, Inc. | Integrated MOS power transistor with body extension region for poly field plate depletion assist |
US8963241B1 (en) | 2009-11-13 | 2015-02-24 | Maxim Integrated Products, Inc. | Integrated MOS power transistor with poly field plate extension for depletion assist |
US20110115019A1 (en) * | 2009-11-13 | 2011-05-19 | Maxim Integrated Products, Inc. | Cmos compatible low gate charge lateral mosfet |
US8987818B1 (en) | 2009-11-13 | 2015-03-24 | Maxim Integrated Products, Inc. | Integrated MOS power transistor with thin gate oxide and low gate charge |
US8946851B1 (en) | 2009-11-13 | 2015-02-03 | Maxim Integrated Products, Inc. | Integrated MOS power transistor with thin gate oxide and low gate charge |
JP2011119606A (ja) * | 2009-12-07 | 2011-06-16 | Sen Corp | 半導体装置の製造方法 |
US9362160B2 (en) * | 2012-01-13 | 2016-06-07 | Newport Fab, Llc | SOI structure and method for utilizing trenches for signal isolation and linearity |
US8963247B2 (en) | 2012-01-13 | 2015-02-24 | Newport Fab, Llc | Selective amorphization for electrical signal isolation and linearity in SOI structures |
US8816471B2 (en) | 2012-01-13 | 2014-08-26 | Newport Fab, Llc | Electrical signal isolation and linearity in SOI structures |
CN110246803A (zh) * | 2018-03-08 | 2019-09-17 | 联华电子股份有限公司 | 半导体元件及其制作方法 |
CN112736026B (zh) * | 2021-01-12 | 2022-05-06 | 度亘激光技术(苏州)有限公司 | 半导体结构的形成方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62142318A (ja) * | 1985-12-17 | 1987-06-25 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JPH01225350A (ja) * | 1988-03-04 | 1989-09-08 | Nec Corp | 半導体集積回路装置の製造方法 |
US5198387A (en) * | 1989-12-01 | 1993-03-30 | Texas Instruments Incorporated | Method and apparatus for in-situ doping of deposited silicon |
JPH07221111A (ja) | 1994-01-31 | 1995-08-18 | Sony Corp | 半導体装置の製造方法 |
KR0176153B1 (ko) * | 1995-05-30 | 1999-04-15 | 김광호 | 반도체 장치의 소자분리막 및 그 형성방법 |
JPH10214844A (ja) | 1997-01-31 | 1998-08-11 | Sharp Corp | 半導体基板の製造方法 |
JPH1167682A (ja) | 1997-08-08 | 1999-03-09 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US5929508A (en) | 1998-05-21 | 1999-07-27 | Harris Corp | Defect gettering by induced stress |
US6037238A (en) | 1999-01-04 | 2000-03-14 | Vanguard International Semiconductor Corporation | Process to reduce defect formation occurring during shallow trench isolation formation |
US6514833B1 (en) * | 1999-09-24 | 2003-02-04 | Advanced Micro Devices, Inc. | Method of inhibiting lateral diffusion between adjacent wells by introducing carbon or fluorine ions into bottom of STI groove |
JP2002026022A (ja) | 2000-07-10 | 2002-01-25 | Mitsubishi Electric Corp | 半導体装置の製造方法および半導体装置 |
KR100525915B1 (ko) * | 2002-07-12 | 2005-11-02 | 주식회사 하이닉스반도체 | 반도체 소자의 소자분리막 형성 방법 |
US6576558B1 (en) * | 2002-10-02 | 2003-06-10 | Taiwan Semiconductor Manufacturing Company | High aspect ratio shallow trench using silicon implanted oxide |
-
2004
- 2004-01-07 JP JP2004002408A patent/JP2005197475A/ja active Pending
- 2004-05-13 US US10/844,536 patent/US7226846B2/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009283492A (ja) * | 2008-05-19 | 2009-12-03 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2009283494A (ja) * | 2008-05-19 | 2009-12-03 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2009283493A (ja) * | 2008-05-19 | 2009-12-03 | Seiko Epson Corp | 半導体装置の製造方法 |
JP2017220673A (ja) * | 2017-07-24 | 2017-12-14 | ルネサスエレクトロニクス株式会社 | 撮像装置の製造方法および撮像装置 |
Also Published As
Publication number | Publication date |
---|---|
US20050148153A1 (en) | 2005-07-07 |
US7226846B2 (en) | 2007-06-05 |
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