JP2004527126A - ダミー構造を備えたトレンチもしくはバイアを有するウェハ上の金属層を電解研磨する方法 - Google Patents
ダミー構造を備えたトレンチもしくはバイアを有するウェハ上の金属層を電解研磨する方法 Download PDFInfo
- Publication number
- JP2004527126A JP2004527126A JP2002584381A JP2002584381A JP2004527126A JP 2004527126 A JP2004527126 A JP 2004527126A JP 2002584381 A JP2002584381 A JP 2002584381A JP 2002584381 A JP2002584381 A JP 2002584381A JP 2004527126 A JP2004527126 A JP 2004527126A
- Authority
- JP
- Japan
- Prior art keywords
- metal layer
- layer
- concave region
- forming
- dielectric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P52/20—Electromechanical polishing [EMP]; Electrochemical mechanical polishing [ECMP]
- H10P52/203—Electromechanical polishing [EMP]; Electrochemical mechanical polishing [ECMP] of conductive or resistive materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/062—Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US28627301P | 2001-04-24 | 2001-04-24 | |
| US10/108,614 US6638863B2 (en) | 2001-04-24 | 2002-03-27 | Electropolishing metal layers on wafers having trenches or vias with dummy structures |
| PCT/US2002/010500 WO2002086961A1 (en) | 2001-04-24 | 2002-04-04 | Electropolishing metal layers on wafers having trenches or vias with dummy structures |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004527126A true JP2004527126A (ja) | 2004-09-02 |
| JP2004527126A5 JP2004527126A5 (https=) | 2005-12-22 |
Family
ID=26806086
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002584381A Pending JP2004527126A (ja) | 2001-04-24 | 2002-04-04 | ダミー構造を備えたトレンチもしくはバイアを有するウェハ上の金属層を電解研磨する方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US6638863B2 (https=) |
| EP (1) | EP1382065A4 (https=) |
| JP (1) | JP2004527126A (https=) |
| KR (1) | KR101018187B1 (https=) |
| CN (1) | CN100541746C (https=) |
| TW (1) | TWI258814B (https=) |
| WO (1) | WO2002086961A1 (https=) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012500480A (ja) * | 2008-08-20 | 2012-01-05 | エーシーエム リサーチ (シャンハイ) インコーポレーテッド | バリア層除去方法及び装置 |
| JP2019535124A (ja) * | 2016-08-16 | 2019-12-05 | ノースロップ グラマン システムズ コーポレイションNorthrop Grumman Systems Corporation | 超伝導体の相互接続製造のための前洗浄方法 |
Families Citing this family (55)
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|---|---|---|---|---|
| US6939795B2 (en) * | 2002-09-23 | 2005-09-06 | Texas Instruments Incorporated | Selective dry etching of tantalum and tantalum nitride |
| US8021976B2 (en) | 2002-10-15 | 2011-09-20 | Megica Corporation | Method of wire bonding over active area of a semiconductor circuit |
| US7077721B2 (en) | 2000-02-17 | 2006-07-18 | Applied Materials, Inc. | Pad assembly for electrochemical mechanical processing |
| US20040182721A1 (en) * | 2003-03-18 | 2004-09-23 | Applied Materials, Inc. | Process control in electro-chemical mechanical polishing |
| US6991526B2 (en) * | 2002-09-16 | 2006-01-31 | Applied Materials, Inc. | Control of removal profile in electrochemically assisted CMP |
| US6848970B2 (en) | 2002-09-16 | 2005-02-01 | Applied Materials, Inc. | Process control in electrochemically assisted planarization |
| US7303462B2 (en) | 2000-02-17 | 2007-12-04 | Applied Materials, Inc. | Edge bead removal by an electro polishing process |
| US6962524B2 (en) * | 2000-02-17 | 2005-11-08 | Applied Materials, Inc. | Conductive polishing article for electrochemical mechanical polishing |
| US20040253809A1 (en) * | 2001-08-18 | 2004-12-16 | Yao Xiang Yu | Forming a semiconductor structure using a combination of planarizing methods and electropolishing |
| US6837983B2 (en) * | 2002-01-22 | 2005-01-04 | Applied Materials, Inc. | Endpoint detection for electro chemical mechanical polishing and electropolishing processes |
| US20060049056A1 (en) * | 2002-04-12 | 2006-03-09 | Acm Research, Inc. | Electropolishing and electroplating methods |
| KR20050004156A (ko) * | 2002-05-17 | 2005-01-12 | 가부시키가이샤 에바라 세이사꾸쇼 | 기판처리장치 및 기판처리방법 |
| KR100467803B1 (ko) * | 2002-07-23 | 2005-01-24 | 동부아남반도체 주식회사 | 반도체 소자 제조 방법 |
| US7112270B2 (en) * | 2002-09-16 | 2006-09-26 | Applied Materials, Inc. | Algorithm for real-time process control of electro-polishing |
| US20050061674A1 (en) * | 2002-09-16 | 2005-03-24 | Yan Wang | Endpoint compensation in electroprocessing |
| US6812069B2 (en) * | 2002-12-17 | 2004-11-02 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for improving semiconductor process wafer CMP uniformity while avoiding fracture |
| JP2004273438A (ja) * | 2003-02-17 | 2004-09-30 | Pioneer Electronic Corp | エッチング用マスク |
| US7042065B2 (en) * | 2003-03-05 | 2006-05-09 | Ricoh Company, Ltd. | Semiconductor device and method of manufacturing the same |
| US6693357B1 (en) * | 2003-03-13 | 2004-02-17 | Texas Instruments Incorporated | Methods and semiconductor devices with wiring layer fill structures to improve planarization uniformity |
| JP4575651B2 (ja) * | 2003-06-04 | 2010-11-04 | 富士ゼロックス株式会社 | 積層構造体の製造方法および積層構造体 |
| US7223685B2 (en) * | 2003-06-23 | 2007-05-29 | Intel Corporation | Damascene fabrication with electrochemical layer removal |
| KR100546354B1 (ko) * | 2003-07-28 | 2006-01-26 | 삼성전자주식회사 | 원하는 분석 위치를 용이하게 찾을 수 있는 반도체 소자 |
| JP2005057003A (ja) * | 2003-08-01 | 2005-03-03 | Sanyo Electric Co Ltd | 半導体集積回路装置 |
| US6818517B1 (en) * | 2003-08-29 | 2004-11-16 | Asm International N.V. | Methods of depositing two or more layers on a substrate in situ |
| US7071074B2 (en) * | 2003-09-24 | 2006-07-04 | Infineon Technologies Ag | Structure and method for placement, sizing and shaping of dummy structures |
| US7186164B2 (en) | 2003-12-03 | 2007-03-06 | Applied Materials, Inc. | Processing pad assembly with zone control |
| US20080306126A1 (en) * | 2004-01-05 | 2008-12-11 | Fonseca Vivian A | Peroxisome proliferator activated receptor treatment of hyperhomocysteinemia and its complications |
| US7390744B2 (en) | 2004-01-29 | 2008-06-24 | Applied Materials, Inc. | Method and composition for polishing a substrate |
| KR100580110B1 (ko) * | 2004-05-28 | 2006-05-12 | 매그나칩 반도체 유한회사 | 반도체 소자의 더미 패턴 구조 |
| US7339272B2 (en) * | 2004-06-14 | 2008-03-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device with scattering bars adjacent conductive lines |
| US7084064B2 (en) | 2004-09-14 | 2006-08-01 | Applied Materials, Inc. | Full sequence metal and barrier layer electrochemical mechanical processing |
| JP2006173501A (ja) * | 2004-12-17 | 2006-06-29 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| US7655565B2 (en) * | 2005-01-26 | 2010-02-02 | Applied Materials, Inc. | Electroprocessing profile control |
| CN101142668A (zh) | 2005-03-16 | 2008-03-12 | 富士通株式会社 | 半导体装置及其制造方法 |
| KR100724191B1 (ko) * | 2005-12-28 | 2007-05-31 | 동부일렉트로닉스 주식회사 | 반도체소자의 화학적기계 연마방법 |
| US7422982B2 (en) * | 2006-07-07 | 2008-09-09 | Applied Materials, Inc. | Method and apparatus for electroprocessing a substrate with edge profile control |
| JP5055980B2 (ja) * | 2006-11-29 | 2012-10-24 | 富士通セミコンダクター株式会社 | 電子装置の製造方法および半導体装置の製造方法 |
| KR100910447B1 (ko) * | 2007-05-18 | 2009-08-04 | 주식회사 동부하이텍 | 금속 패드 형성 방법 |
| US8957484B2 (en) * | 2008-02-29 | 2015-02-17 | University Of Washington | Piezoelectric substrate, fabrication and related methods |
| KR101487370B1 (ko) * | 2008-07-07 | 2015-01-30 | 삼성전자주식회사 | 마스크 레이아웃의 형성 방법 및 마스크 레이 아웃 |
| KR20100060309A (ko) * | 2008-11-27 | 2010-06-07 | 주식회사 동부하이텍 | 반도체 소자 |
| US8604898B2 (en) * | 2009-04-20 | 2013-12-10 | International Business Machines Corporation | Vertical integrated circuit switches, design structure and methods of fabricating same |
| DE112010002718B4 (de) * | 2009-06-26 | 2019-11-21 | Sumco Corp. | Verfahren zur reinigung eines siliciumwafers sowie verfahren zur herstellung eines epitaktischen wafers unter verwendung des reinigungsverfahrens |
| US8432031B1 (en) * | 2009-12-22 | 2013-04-30 | Western Digital Technologies, Inc. | Semiconductor die including a current routing line having non-metallic slots |
| US9443796B2 (en) * | 2013-03-15 | 2016-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Air trench in packages incorporating hybrid bonding |
| US8772951B1 (en) * | 2013-08-29 | 2014-07-08 | Qualcomm Incorporated | Ultra fine pitch and spacing interconnects for substrate |
| US9159670B2 (en) | 2013-08-29 | 2015-10-13 | Qualcomm Incorporated | Ultra fine pitch and spacing interconnects for substrate |
| CN103474393B (zh) * | 2013-09-11 | 2015-07-08 | 华进半导体封装先导技术研发中心有限公司 | 免cmp的电镀面铜去除及阻挡层复用的工艺方法 |
| CN104637862B (zh) * | 2013-11-14 | 2019-10-18 | 盛美半导体设备(上海)有限公司 | 半导体结构形成方法 |
| CN104793298B (zh) * | 2015-04-13 | 2017-03-22 | 华进半导体封装先导技术研发中心有限公司 | 一种带侧面焊盘的载板结构及其制作方法 |
| CN106803495B (zh) * | 2016-12-28 | 2019-11-22 | 上海集成电路研发中心有限公司 | 金属埋层凸起的去除方法以及空气隙的制备方法 |
| JP7353121B2 (ja) | 2019-10-08 | 2023-09-29 | キヤノン株式会社 | 半導体装置および機器 |
| KR102805153B1 (ko) * | 2020-07-10 | 2025-05-08 | 삼성전자주식회사 | 반도체 장치 제조 방법 |
| US11976002B2 (en) * | 2021-01-05 | 2024-05-07 | Applied Materials, Inc. | Methods for encapsulating silver mirrors on optical structures |
| US20260011566A1 (en) * | 2024-07-05 | 2026-01-08 | Nanya Technology Corporation | Method for processing a wafer |
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| US4127459A (en) | 1977-09-01 | 1978-11-28 | Jumer John F | Method and apparatus for incremental electro-polishing |
| US4190513A (en) | 1978-09-18 | 1980-02-26 | Jumer John F | Apparatus for containerless portable electro-polishing |
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| JPH0438852A (ja) * | 1990-06-04 | 1992-02-10 | Hitachi Ltd | 多層配線を有する半導体装置 |
| US5486234A (en) * | 1993-07-16 | 1996-01-23 | The United States Of America As Represented By The United States Department Of Energy | Removal of field and embedded metal by spin spray etching |
| JP3297220B2 (ja) * | 1993-10-29 | 2002-07-02 | 株式会社東芝 | 半導体装置の製造方法および半導体装置 |
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| JPH08195393A (ja) * | 1995-01-17 | 1996-07-30 | Toshiba Corp | メタル配線形成方法 |
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| US6309956B1 (en) | 1997-09-30 | 2001-10-30 | Intel Corporation | Fabricating low K dielectric interconnect systems by using dummy structures to enhance process |
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| US6232231B1 (en) * | 1998-08-31 | 2001-05-15 | Cypress Semiconductor Corporation | Planarized semiconductor interconnect topography and method for polishing a metal layer to form interconnect |
| US6315883B1 (en) * | 1998-10-26 | 2001-11-13 | Novellus Systems, Inc. | Electroplanarization of large and small damascene features using diffusion barriers and electropolishing |
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| US6395607B1 (en) * | 1999-06-09 | 2002-05-28 | Alliedsignal Inc. | Integrated circuit fabrication method for self-aligned copper diffusion barrier |
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| JP4513145B2 (ja) * | 1999-09-07 | 2010-07-28 | ソニー株式会社 | 半導体装置の製造方法および研磨方法 |
| US6653226B1 (en) * | 2001-01-09 | 2003-11-25 | Novellus Systems, Inc. | Method for electrochemical planarization of metal surfaces |
| US6383917B1 (en) * | 1999-10-21 | 2002-05-07 | Intel Corporation | Method for making integrated circuits |
| JP2002158278A (ja) | 2000-11-20 | 2002-05-31 | Hitachi Ltd | 半導体装置およびその製造方法ならびに設計方法 |
| US6627550B2 (en) * | 2001-03-27 | 2003-09-30 | Micron Technology, Inc. | Post-planarization clean-up |
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-
2002
- 2002-03-27 US US10/108,614 patent/US6638863B2/en not_active Expired - Lifetime
- 2002-04-04 KR KR1020037013852A patent/KR101018187B1/ko not_active Expired - Fee Related
- 2002-04-04 EP EP02764165A patent/EP1382065A4/en not_active Withdrawn
- 2002-04-04 WO PCT/US2002/010500 patent/WO2002086961A1/en not_active Ceased
- 2002-04-04 JP JP2002584381A patent/JP2004527126A/ja active Pending
- 2002-04-04 CN CNB028088344A patent/CN100541746C/zh not_active Expired - Fee Related
- 2002-04-15 TW TW091107631A patent/TWI258814B/zh not_active IP Right Cessation
-
2003
- 2003-09-16 US US10/664,783 patent/US20040080053A1/en not_active Abandoned
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012500480A (ja) * | 2008-08-20 | 2012-01-05 | エーシーエム リサーチ (シャンハイ) インコーポレーテッド | バリア層除去方法及び装置 |
| US8598039B2 (en) | 2008-08-20 | 2013-12-03 | Acm Research (Shanghai) Inc. | Barrier layer removal method and apparatus |
| JP2019535124A (ja) * | 2016-08-16 | 2019-12-05 | ノースロップ グラマン システムズ コーポレイションNorthrop Grumman Systems Corporation | 超伝導体の相互接続製造のための前洗浄方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20040080053A1 (en) | 2004-04-29 |
| US20020175419A1 (en) | 2002-11-28 |
| US6638863B2 (en) | 2003-10-28 |
| CN1663036A (zh) | 2005-08-31 |
| EP1382065A4 (en) | 2009-04-15 |
| WO2002086961A1 (en) | 2002-10-31 |
| KR101018187B1 (ko) | 2011-02-28 |
| CN100541746C (zh) | 2009-09-16 |
| KR20030093327A (ko) | 2003-12-06 |
| TWI258814B (en) | 2006-07-21 |
| EP1382065A1 (en) | 2004-01-21 |
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