JP2004521483A5 - - Google Patents

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Publication number
JP2004521483A5
JP2004521483A5 JP2002540202A JP2002540202A JP2004521483A5 JP 2004521483 A5 JP2004521483 A5 JP 2004521483A5 JP 2002540202 A JP2002540202 A JP 2002540202A JP 2002540202 A JP2002540202 A JP 2002540202A JP 2004521483 A5 JP2004521483 A5 JP 2004521483A5
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JP
Japan
Prior art keywords
substrate
flash memory
source
oxide
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002540202A
Other languages
English (en)
Japanese (ja)
Other versions
JP4944352B2 (ja
JP2004521483A (ja
Filing date
Publication date
Priority claimed from US09/699,711 external-priority patent/US6653189B1/en
Application filed filed Critical
Publication of JP2004521483A publication Critical patent/JP2004521483A/ja
Publication of JP2004521483A5 publication Critical patent/JP2004521483A5/ja
Application granted granted Critical
Publication of JP4944352B2 publication Critical patent/JP4944352B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2002540202A 2000-10-30 2001-08-06 フラッシュメモリセルの製造方法 Expired - Fee Related JP4944352B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/699,711 US6653189B1 (en) 2000-10-30 2000-10-30 Source side boron implant and drain side MDD implant for deep sub 0.18 micron flash memory
US09/699,711 2000-10-30
PCT/US2001/024680 WO2002037551A1 (en) 2000-10-30 2001-08-06 Non-volatile memory with source side boron implantation

Publications (3)

Publication Number Publication Date
JP2004521483A JP2004521483A (ja) 2004-07-15
JP2004521483A5 true JP2004521483A5 (https=) 2005-04-07
JP4944352B2 JP4944352B2 (ja) 2012-05-30

Family

ID=24810556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002540202A Expired - Fee Related JP4944352B2 (ja) 2000-10-30 2001-08-06 フラッシュメモリセルの製造方法

Country Status (8)

Country Link
US (1) US6653189B1 (https=)
EP (1) EP1356505A1 (https=)
JP (1) JP4944352B2 (https=)
KR (1) KR100838382B1 (https=)
CN (1) CN1293617C (https=)
AU (1) AU2001279213A1 (https=)
TW (1) TWI248675B (https=)
WO (1) WO2002037551A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100567757B1 (ko) * 2003-12-30 2006-04-05 동부아남반도체 주식회사 반도체 소자의 제조 방법
KR100604846B1 (ko) * 2004-04-23 2006-07-31 삼성전자주식회사 다층의 유전체층을 포함하는 메모리 소자 및 그 제조 방법
US7157335B1 (en) * 2004-08-13 2007-01-02 Spansion Llc Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to improve charge loss and contact resistance in multi bit memory devices
KR100898440B1 (ko) * 2007-06-27 2009-05-21 주식회사 동부하이텍 플래시 메모리 소자의 제조 방법
WO2009045964A1 (en) * 2007-10-01 2009-04-09 Applied Materials, Inc. Low temperature conformal oxide formation and applications

Family Cites Families (24)

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Publication number Priority date Publication date Assignee Title
JP2585262B2 (ja) * 1987-04-24 1997-02-26 シチズン時計株式会社 半導体不揮発性メモリ
US5276344A (en) 1990-04-27 1994-01-04 Mitsubishi Denki Kabushiki Kaisha Field effect transistor having impurity regions of different depths and manufacturing method thereof
US5424567A (en) * 1991-05-15 1995-06-13 North American Philips Corporation Protected programmable transistor with reduced parasitic capacitances and method of fabrication
JPH05283710A (ja) 1991-12-06 1993-10-29 Intel Corp 高電圧mosトランジスタ及びその製造方法
JPH0685278A (ja) * 1992-09-07 1994-03-25 Hitachi Ltd 半導体装置の製造方法
JP3288099B2 (ja) * 1992-12-28 2002-06-04 新日本製鐵株式会社 不揮発性半導体記憶装置及びその書き換え方法
US5592003A (en) 1992-12-28 1997-01-07 Nippon Steel Corporation Nonvolatile semiconductor memory and method of rewriting data thereto
JPH06291330A (ja) 1993-03-31 1994-10-18 Citizen Watch Co Ltd 半導体不揮発性記憶素子とその製造方法
JPH06296029A (ja) * 1993-04-08 1994-10-21 Citizen Watch Co Ltd 半導体不揮発性記憶素子とその製造方法
DE69413960T2 (de) * 1994-07-18 1999-04-01 Stmicroelectronics S.R.L., Agrate Brianza, Mailand/Milano Nicht-flüchtiger EPROM und Flash-EEPROM-Speicher und Verfahren zu seiner Herstellung
US5429970A (en) 1994-07-18 1995-07-04 United Microelectronics Corporation Method of making flash EEPROM memory cell
US5518942A (en) * 1995-02-22 1996-05-21 Alliance Semiconductor Corporation Method of making flash EPROM cell having improved erase characteristics by using a tilt angle implant
JP2956549B2 (ja) 1995-09-14 1999-10-04 日本電気株式会社 半導体記憶装置及びその製造方法とデータ消去方法
JPH0997884A (ja) * 1995-10-02 1997-04-08 Toshiba Corp 不揮発性半導体記憶装置
US5882970A (en) 1995-11-03 1999-03-16 United Microelectronics Corporation Method for fabricating flash memory cell having a decreased overlapped region between its source and gate
US5589413A (en) 1995-11-27 1996-12-31 Taiwan Semiconductor Manufacturing Company Method of manufacturing self-aligned bit-line during EPROM fabrication
TW437099B (en) * 1997-09-26 2001-05-28 Matsushita Electronics Corp Non-volatile semiconductor memory device and the manufacturing method thereof
US5888870A (en) 1997-10-22 1999-03-30 Advanced Micro Devices, Inc. Memory cell fabrication employing an interpoly gate dielectric arranged upon a polished floating gate
US5933729A (en) 1997-12-08 1999-08-03 Advanced Micro Devices, Inc. Reduction of ONO fence during self-aligned etch to eliminate poly stringers
KR100308133B1 (ko) * 1999-01-12 2001-09-26 김영환 듀얼 게이트 모스 트랜지스터 제조방법
TW407348B (en) 1999-02-03 2000-10-01 United Microelectronics Corp Manufacture of the flash memory
US6180456B1 (en) * 1999-02-17 2001-01-30 International Business Machines Corporation Triple polysilicon embedded NVRAM cell and method thereof
US6163482A (en) * 1999-08-19 2000-12-19 Worldwide Semiconductor Manufacturing Corporation One transistor EEPROM cell using ferro-electric spacer
US6524914B1 (en) * 2000-10-30 2003-02-25 Advanced Micro Devices, Inc. Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory

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