JP2002517089A - 浅いトレンチ分離のための自己平坦化絶縁層を形成する方法 - Google Patents

浅いトレンチ分離のための自己平坦化絶縁層を形成する方法

Info

Publication number
JP2002517089A
JP2002517089A JP2000551427A JP2000551427A JP2002517089A JP 2002517089 A JP2002517089 A JP 2002517089A JP 2000551427 A JP2000551427 A JP 2000551427A JP 2000551427 A JP2000551427 A JP 2000551427A JP 2002517089 A JP2002517089 A JP 2002517089A
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JP
Japan
Prior art keywords
trench
substrate
processing chamber
cvd
precursor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000551427A
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English (en)
Japanese (ja)
Other versions
JP2002517089A5 (enExample
Inventor
ファブリーク ジガール，
フレデリク ジェラルド，
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of JP2002517089A publication Critical patent/JP2002517089A/ja
Publication of JP2002517089A5 publication Critical patent/JP2002517089A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
JP2000551427A 1998-05-22 1999-05-10 浅いトレンチ分離のための自己平坦化絶縁層を形成する方法 Pending JP2002517089A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP98401232.8 1998-05-22
EP98401232A EP0959496B1 (en) 1998-05-22 1998-05-22 Methods for forming self-planarized dielectric layer for shallow trench isolation
PCT/IB1999/000835 WO1999062108A2 (en) 1998-05-22 1999-05-10 Methods for forming self-planarized dielectric layer for shallow trench isolation

Publications (2)

Publication Number Publication Date
JP2002517089A true JP2002517089A (ja) 2002-06-11
JP2002517089A5 JP2002517089A5 (enExample) 2009-10-22

Family

ID=8235378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000551427A Pending JP2002517089A (ja) 1998-05-22 1999-05-10 浅いトレンチ分離のための自己平坦化絶縁層を形成する方法

Country Status (7)

Country Link
US (1) US6733955B1 (enExample)
EP (1) EP0959496B1 (enExample)
JP (1) JP2002517089A (enExample)
KR (2) KR100687367B1 (enExample)
DE (1) DE69835276T2 (enExample)
TW (1) TW413885B (enExample)
WO (1) WO1999062108A2 (enExample)

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JP2007110043A (ja) * 2005-10-17 2007-04-26 Nec Electronics Corp 半導体装置の製造方法
JP2008182199A (ja) * 2006-12-07 2008-08-07 Applied Materials Inc 誘電ギャップ充填用のマルチステップ堆積・エッチング・堆積（ｄｅｐ−ｅｔｃｈ−ｄｅｐ）高密度プラズマ化学気相堆積プロセス
JP2008235857A (ja) * 2006-12-07 2008-10-02 Applied Materials Inc 薄膜プロセスの方法

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TW439194B (en) * 2000-01-24 2001-06-07 United Microelectronics Corp Manufacturing method of shallow trench isolation region
TW479315B (en) * 2000-10-31 2002-03-11 Applied Materials Inc Continuous depostiton process
JP4989817B2 (ja) * 2000-12-21 2012-08-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
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US7141483B2 (en) * 2002-09-19 2006-11-28 Applied Materials, Inc. Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill
US7335609B2 (en) * 2004-08-27 2008-02-26 Applied Materials, Inc. Gap-fill depositions introducing hydroxyl-containing precursors in the formation of silicon containing dielectric materials
US7456116B2 (en) * 2002-09-19 2008-11-25 Applied Materials, Inc. Gap-fill depositions in the formation of silicon containing dielectric materials
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US6828211B2 (en) * 2002-10-01 2004-12-07 Taiwan Semiconductor Manufacturing Co., Ltd. Shallow trench filled with two or more dielectrics for isolation and coupling or for stress control
US20040074516A1 (en) * 2002-10-18 2004-04-22 Hogle Richard A. Sub-atmospheric supply of fluorine to semiconductor process chamber
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JP4161745B2 (ja) * 2003-03-06 2008-10-08 株式会社デンソー 光学素子およびその製造方法
IL155137A0 (en) * 2003-03-27 2003-10-31 Yissum Res Dev Co A method for generating plant diversity
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TW413885B (en) 2000-12-01
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