JP2002334587A5 - - Google Patents
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- JP2002334587A5 JP2002334587A5 JP2001137165A JP2001137165A JP2002334587A5 JP 2002334587 A5 JP2002334587 A5 JP 2002334587A5 JP 2001137165 A JP2001137165 A JP 2001137165A JP 2001137165 A JP2001137165 A JP 2001137165A JP 2002334587 A5 JP2002334587 A5 JP 2002334587A5
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Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001137165A JP4715024B2 (ja) | 2001-05-08 | 2001-05-08 | 不揮発性半導体記憶装置のプログラム方法 |
| US09/955,160 US6587381B2 (en) | 2001-05-08 | 2001-09-19 | Programming method for non-volatile semiconductor memory device |
| DE60200498T DE60200498T2 (de) | 2001-05-08 | 2002-02-11 | Programmierverfahren für einen nichtflüchtigen Halbleiterspeicher |
| EP02002973A EP1256960B1 (en) | 2001-05-08 | 2002-02-11 | Programming method for non-volatile semiconductor memory device |
| AT02002973T ATE267447T1 (de) | 2001-05-08 | 2002-02-11 | Programmierverfahren für einen nichtflüchtigen halbleiterspeicher |
| KR10-2002-0024959A KR100446402B1 (ko) | 2001-05-08 | 2002-05-07 | 불휘발성 반도체 기억 장치의 프로그램 방법 |
| CNB021190542A CN1228786C (zh) | 2001-05-08 | 2002-05-08 | 非易失性半导体存储器的编程方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001137165A JP4715024B2 (ja) | 2001-05-08 | 2001-05-08 | 不揮発性半導体記憶装置のプログラム方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002334587A JP2002334587A (ja) | 2002-11-22 |
| JP2002334587A5 true JP2002334587A5 (OSRAM) | 2008-06-19 |
| JP4715024B2 JP4715024B2 (ja) | 2011-07-06 |
Family
ID=18984311
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001137165A Expired - Fee Related JP4715024B2 (ja) | 2001-05-08 | 2001-05-08 | 不揮発性半導体記憶装置のプログラム方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6587381B2 (OSRAM) |
| EP (1) | EP1256960B1 (OSRAM) |
| JP (1) | JP4715024B2 (OSRAM) |
| KR (1) | KR100446402B1 (OSRAM) |
| CN (1) | CN1228786C (OSRAM) |
| AT (1) | ATE267447T1 (OSRAM) |
| DE (1) | DE60200498T2 (OSRAM) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3640175B2 (ja) * | 2001-04-13 | 2005-04-20 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP2002334588A (ja) * | 2001-05-11 | 2002-11-22 | Seiko Epson Corp | 不揮発性半導体記憶装置のプログラム方法 |
| JP3716914B2 (ja) | 2001-05-31 | 2005-11-16 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP3659205B2 (ja) * | 2001-08-30 | 2005-06-15 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置及びその駆動方法 |
| JP3843869B2 (ja) * | 2002-03-15 | 2006-11-08 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP3821032B2 (ja) * | 2002-03-20 | 2006-09-13 | セイコーエプソン株式会社 | ファイルストレージ型不揮発性半導体記憶装置 |
| JP3867624B2 (ja) * | 2002-06-06 | 2007-01-10 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置およびその駆動方法 |
| JP3815381B2 (ja) * | 2002-06-06 | 2006-08-30 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置およびその駆動方法 |
| JP3871049B2 (ja) * | 2002-12-10 | 2007-01-24 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP2004199738A (ja) * | 2002-12-16 | 2004-07-15 | Seiko Epson Corp | 不揮発性記憶装置 |
| JP3985689B2 (ja) * | 2003-02-21 | 2007-10-03 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP3873908B2 (ja) | 2003-02-28 | 2007-01-31 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
| JP3786096B2 (ja) * | 2003-02-28 | 2006-06-14 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP3786095B2 (ja) * | 2003-02-28 | 2006-06-14 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP3767588B2 (ja) * | 2003-08-29 | 2006-04-19 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置及びその制御方法 |
| JP4196191B2 (ja) * | 2003-09-09 | 2008-12-17 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置及びその制御方法 |
| US7120051B2 (en) * | 2004-12-14 | 2006-10-10 | Sandisk Corporation | Pipelined programming of non-volatile memories using early data |
| US7307882B2 (en) * | 2005-06-29 | 2007-12-11 | Macronix International Co., Ltd. | Non-volatile memory |
| US7233528B2 (en) * | 2005-07-25 | 2007-06-19 | Atmel Corporation | Reduction of programming time in electrically programmable devices |
| TWI265626B (en) * | 2005-08-19 | 2006-11-01 | Powerchip Semiconductor Corp | Non-volatile memory and manufacturing method and operating method thereof |
| US7366013B2 (en) * | 2005-12-09 | 2008-04-29 | Micron Technology, Inc. | Single level cell programming in a multiple level cell non-volatile memory device |
| US7349254B2 (en) * | 2006-05-31 | 2008-03-25 | Qimonda Flash Gmbh & Co. Kg | Charge-trapping memory device and methods for its manufacturing and operation |
| KR101320519B1 (ko) | 2006-07-27 | 2013-10-23 | 삼성전자주식회사 | 패스 트랜지스터를 갖는 비휘발성 메모리 소자 및 그 동작방법 |
| CN101373636B (zh) * | 2007-08-20 | 2010-12-22 | 中芯国际集成电路制造(上海)有限公司 | 防止存储器阵列产生位线干扰的方法 |
| US7672163B2 (en) * | 2007-09-14 | 2010-03-02 | Sandisk Corporation | Control gate line architecture |
| JP5266085B2 (ja) * | 2009-02-17 | 2013-08-21 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置 |
| KR101849176B1 (ko) | 2012-01-06 | 2018-04-17 | 삼성전자주식회사 | 2-트랜지스터 플래시 메모리 및 2-트랜지스터 플래시 메모리의 프로그램 방법 |
| US20170006161A9 (en) * | 2013-03-15 | 2017-01-05 | Genesys Telecommunications Laboratories, Inc. | Intelligent automated agent for a contact center |
| KR102083826B1 (ko) * | 2013-05-13 | 2020-03-03 | 주식회사 실리콘웍스 | 표시 장치의 가비지 프로세싱 회로 |
| US10074438B2 (en) | 2016-06-10 | 2018-09-11 | Cypress Semiconductor Corporation | Methods and devices for reducing program disturb in non-volatile memory cell arrays |
| US9997253B1 (en) | 2016-12-08 | 2018-06-12 | Cypress Semiconductor Corporation | Non-volatile memory array with memory gate line and source line scrambling |
| US11437392B2 (en) * | 2020-07-28 | 2022-09-06 | Globalfoundries Singapore Pte. Ltd. | Compact memory cell with a shared conductive select gate and methods of making such a memory cell |
| US11309324B2 (en) * | 2020-07-28 | 2022-04-19 | Globalfoundries Singapore Pte. Ltd. | Compact memory cell with a shared conductive word line and methods of making such a memory cell |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4723225A (en) * | 1985-10-15 | 1988-02-02 | Texas Instruments Incorporated | Programming current controller |
| DK0740854T3 (da) * | 1991-08-29 | 2003-08-18 | Hyundai Electronics Ind | Automatisk justeret dual-bit split gate (DSG) flash EEPROM celle |
| JPH07161851A (ja) | 1993-12-10 | 1995-06-23 | Sony Corp | 半導体不揮発性記憶装置およびその製造方法 |
| US5408115A (en) | 1994-04-04 | 1995-04-18 | Motorola Inc. | Self-aligned, split-gate EEPROM device |
| US5422504A (en) | 1994-05-02 | 1995-06-06 | Motorola Inc. | EEPROM memory device having a sidewall spacer floating gate electrode and process |
| US5440158A (en) * | 1994-07-05 | 1995-08-08 | Taiwan Semiconductor Manufacturing Company Ltd. | Electrically programmable memory device with improved dual floating gates |
| JPH118324A (ja) * | 1997-04-23 | 1999-01-12 | Sanyo Electric Co Ltd | トランジスタ、トランジスタアレイおよび不揮発性半導体メモリ |
| JPH1131393A (ja) * | 1997-05-15 | 1999-02-02 | Sanyo Electric Co Ltd | 不揮発性半導体記憶装置 |
| US5969383A (en) | 1997-06-16 | 1999-10-19 | Motorola, Inc. | Split-gate memory device and method for accessing the same |
| US5851881A (en) | 1997-10-06 | 1998-12-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making monos flash memory for multi-level logic |
| JP2978477B1 (ja) | 1998-06-12 | 1999-11-15 | 株式会社日立製作所 | 半導体集積回路装置およびその製造方法 |
| JP3973819B2 (ja) | 1999-03-08 | 2007-09-12 | 株式会社東芝 | 半導体記憶装置およびその製造方法 |
| US6133098A (en) * | 1999-05-17 | 2000-10-17 | Halo Lsi Design & Device Technology, Inc. | Process for making and programming and operating a dual-bit multi-level ballistic flash memory |
| US6151248A (en) * | 1999-06-30 | 2000-11-21 | Sandisk Corporation | Dual floating gate EEPROM cell array with steering gates shared by adjacent cells |
| US6255166B1 (en) | 1999-08-05 | 2001-07-03 | Aalo Lsi Design & Device Technology, Inc. | Nonvolatile memory cell, method of programming the same and nonvolatile memory array |
| JP4058219B2 (ja) * | 1999-09-17 | 2008-03-05 | 株式会社ルネサステクノロジ | 半導体集積回路 |
| US6177318B1 (en) | 1999-10-18 | 2001-01-23 | Halo Lsi Design & Device Technology, Inc. | Integration method for sidewall split gate monos transistor |
| US6248633B1 (en) | 1999-10-25 | 2001-06-19 | Halo Lsi Design & Device Technology, Inc. | Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory |
| JP2001357682A (ja) | 2000-06-12 | 2001-12-26 | Sony Corp | メモリシステムおよびそのプログラム方法 |
| JP2001357681A (ja) * | 2000-06-12 | 2001-12-26 | Sony Corp | 半導体記憶装置およびその駆動方法 |
| EP1215681B1 (en) | 2000-12-05 | 2008-04-16 | Halo Lsi Design and Device Technology Inc. | Program and erase methods in twin MONOS cell memories |
| DE60235335D1 (de) * | 2001-03-15 | 2010-04-01 | Halo Inc | Doppelbit MONOS Speicherzellgebrauch für breite Programbandbreite |
-
2001
- 2001-05-08 JP JP2001137165A patent/JP4715024B2/ja not_active Expired - Fee Related
- 2001-09-19 US US09/955,160 patent/US6587381B2/en not_active Expired - Fee Related
-
2002
- 2002-02-11 EP EP02002973A patent/EP1256960B1/en not_active Expired - Lifetime
- 2002-02-11 DE DE60200498T patent/DE60200498T2/de not_active Expired - Lifetime
- 2002-02-11 AT AT02002973T patent/ATE267447T1/de not_active IP Right Cessation
- 2002-05-07 KR KR10-2002-0024959A patent/KR100446402B1/ko not_active Expired - Fee Related
- 2002-05-08 CN CNB021190542A patent/CN1228786C/zh not_active Expired - Fee Related