JP2002299591A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JP2002299591A JP2002299591A JP2001101514A JP2001101514A JP2002299591A JP 2002299591 A JP2002299591 A JP 2002299591A JP 2001101514 A JP2001101514 A JP 2001101514A JP 2001101514 A JP2001101514 A JP 2001101514A JP 2002299591 A JP2002299591 A JP 2002299591A
- Authority
- JP
- Japan
- Prior art keywords
- buried
- insulating film
- substrate
- region
- buried insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001101514A JP2002299591A (ja) | 2001-03-30 | 2001-03-30 | 半導体装置 |
| TW091105637A TW533554B (en) | 2001-03-30 | 2002-03-22 | Semiconductor wafer and its manufacturing method, semiconductor device and its manufacturing method |
| KR1020020016777A KR100579780B1 (ko) | 2001-03-30 | 2002-03-27 | 반도제장치 및 그 제조방법 |
| EP02252283A EP1246248A3 (en) | 2001-03-30 | 2002-03-28 | SOI semiconductor wafer and semiconductor device formed therein |
| CNB021180431A CN1260804C (zh) | 2001-03-30 | 2002-03-29 | 半导体晶片及其制造方法以及半导体器件及其制造方法 |
| US10/108,648 US6593627B2 (en) | 2001-03-30 | 2002-03-29 | SOI semiconductor wafer having different thickness active layers and semiconductor device formed therein |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001101514A JP2002299591A (ja) | 2001-03-30 | 2001-03-30 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002299591A true JP2002299591A (ja) | 2002-10-11 |
| JP2002299591A5 JP2002299591A5 (enExample) | 2005-07-14 |
Family
ID=18954811
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001101514A Pending JP2002299591A (ja) | 2001-03-30 | 2001-03-30 | 半導体装置 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6593627B2 (enExample) |
| EP (1) | EP1246248A3 (enExample) |
| JP (1) | JP2002299591A (enExample) |
| KR (1) | KR100579780B1 (enExample) |
| CN (1) | CN1260804C (enExample) |
| TW (1) | TW533554B (enExample) |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007060895A1 (ja) * | 2005-11-24 | 2007-05-31 | Sony Corporation | 半導体基板、半導体装置および半導体基板の製造方法 |
| US7294539B2 (en) | 2005-03-29 | 2007-11-13 | Seiko Epson Corporation | Semiconductor substrate, semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device |
| US7316943B2 (en) | 2005-07-13 | 2008-01-08 | Seiko Epson Corporation | Method for manufacturing semiconductor apparatus having drain/source on insulator |
| US7351616B2 (en) | 2004-07-30 | 2008-04-01 | Seiko Epson Corporation | Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device |
| US7368340B2 (en) | 2005-03-08 | 2008-05-06 | Seiko Epson Corporation | Semiconductor device and method of making semiconductor devices |
| JP2008521229A (ja) * | 2004-11-18 | 2008-06-19 | インターナショナル・ビジネス・マシーンズ・コーポレーション | SOI基板材料、及び互いに異なる配向をもつSi含有SOIと下部基板とを形成する方法 |
| US7425484B2 (en) | 2005-03-09 | 2008-09-16 | Seiko Epson Corporation | Method of manufacturing semiconductor device |
| US7425495B2 (en) | 2005-12-15 | 2008-09-16 | Seiko Epson Corporation | Method of manufacturing semiconductor substrate and semiconductor device |
| US7465641B2 (en) | 2005-03-29 | 2008-12-16 | Seiko Epson Corporation | Method for manufacturing a semiconductor device |
| US7541258B2 (en) | 2004-12-01 | 2009-06-02 | Seiko Epson Corporation | Method of manufacturing semiconductor substrate and method of manufacturing semiconductor device |
| US7638845B2 (en) | 2005-10-03 | 2009-12-29 | Seiko Epson Corporation | Semiconductor device with buried conductive layer |
| JP2010141244A (ja) * | 2008-12-15 | 2010-06-24 | Mitsumi Electric Co Ltd | 半導体装置 |
| US7847352B2 (en) | 2006-01-18 | 2010-12-07 | Seiko Epson Corporation | Semiconductor device and method for manufacturing the same |
| JP2013042106A (ja) * | 2011-08-12 | 2013-02-28 | Samsung Electronics Co Ltd | 光電集積回路基板及びその製造方法 |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW536802B (en) * | 2002-04-22 | 2003-06-11 | United Microelectronics Corp | Structure and fabrication method of electrostatic discharge protection circuit |
| FR2847077B1 (fr) * | 2002-11-12 | 2006-02-17 | Soitec Silicon On Insulator | Composants semi-conducteurs, et notamment de type soi mixtes, et procede de realisation |
| US6815714B1 (en) | 2003-02-20 | 2004-11-09 | National Semiconductor Corporation | Conductive structure in a semiconductor material |
| US6812486B1 (en) * | 2003-02-20 | 2004-11-02 | National Semiconductor Corporation | Conductive structure and method of forming the structure |
| DE102004005506B4 (de) | 2004-01-30 | 2009-11-19 | Atmel Automotive Gmbh | Verfahren zur Erzeugung von aktiven Halbleiterschichten verschiedener Dicke in einem SOI-Wafer |
| DE102004005951B4 (de) * | 2004-02-02 | 2005-12-29 | Atmel Germany Gmbh | Verfahren zur Herstellung von vertikal isolierten Bauelementen auf SOI-Material unterschiedlicher Dicke |
| JP2006073627A (ja) * | 2004-08-31 | 2006-03-16 | Toshiba Corp | 半導体集積装置 |
| FR2881273B1 (fr) * | 2005-01-21 | 2007-05-04 | St Microelectronics Sa | Procede de formation d'un substrat semi-conducteur de circuit integre |
| US7459367B2 (en) * | 2005-07-27 | 2008-12-02 | International Business Machines Corporation | Method of forming a vertical P-N junction device |
| US7666721B2 (en) | 2006-03-15 | 2010-02-23 | International Business Machines Corporation | SOI substrates and SOI devices, and methods for forming the same |
| US7285480B1 (en) * | 2006-04-07 | 2007-10-23 | International Business Machines Corporation | Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof |
| US7812367B2 (en) * | 2008-10-15 | 2010-10-12 | Semiconductor Components Industries, Llc | Two terminal low capacitance multi-channel ESD device |
| CN102986011B (zh) * | 2010-08-12 | 2016-05-11 | 富士电机株式会社 | 半导体器件的制造方法 |
| US10115587B2 (en) * | 2012-02-23 | 2018-10-30 | Fuji Electric Co., Ltd. | Method of manufacturing semiconductor device |
| JP6034268B2 (ja) * | 2013-09-13 | 2016-11-30 | 株式会社東芝 | 半導体装置 |
| JP6173988B2 (ja) * | 2014-08-28 | 2017-08-02 | 株式会社ジャパンディスプレイ | 電極基板の製造方法、電極基板、表示装置および入力装置 |
| EP3742476B1 (en) * | 2019-05-20 | 2024-11-06 | Infineon Technologies AG | Method of implanting an implant species into a substrate at different depths |
| CN111554186B (zh) * | 2020-04-29 | 2022-05-17 | 昆山国显光电有限公司 | 离型层结构和显示面板的制备方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5102809A (en) * | 1990-10-11 | 1992-04-07 | Texas Instruments Incorporated | SOI BICMOS process |
| JPH0685177A (ja) * | 1992-08-31 | 1994-03-25 | Hitachi Ltd | 半導体集積回路装置 |
| JP3191835B2 (ja) * | 1993-05-17 | 2001-07-23 | 住友電気工業株式会社 | 光電子集積回路 |
| US5364800A (en) * | 1993-06-24 | 1994-11-15 | Texas Instruments Incorporated | Varying the thickness of the surface silicon layer in a silicon-on-insulator substrate |
| JP3139904B2 (ja) * | 1993-12-28 | 2001-03-05 | 新日本製鐵株式会社 | 半導体基板の製造方法および製造装置 |
| JP2806286B2 (ja) * | 1995-02-07 | 1998-09-30 | 日本電気株式会社 | 半導体装置 |
| US5828112A (en) * | 1995-09-18 | 1998-10-27 | Kabushiki Kaisha Toshiba | Semiconductor device incorporating an output element having a current-detecting section |
| US5708287A (en) * | 1995-11-29 | 1998-01-13 | Kabushiki Kaisha Toshiba | Power semiconductor device having an active layer |
| JPH11163125A (ja) * | 1997-12-01 | 1999-06-18 | Hitachi Ltd | Soi基板及びsoi基板の製造方法 |
| JP2000164881A (ja) * | 1998-11-30 | 2000-06-16 | Seiko Instruments Inc | 半導体装置とその製造方法 |
-
2001
- 2001-03-30 JP JP2001101514A patent/JP2002299591A/ja active Pending
-
2002
- 2002-03-22 TW TW091105637A patent/TW533554B/zh not_active IP Right Cessation
- 2002-03-27 KR KR1020020016777A patent/KR100579780B1/ko not_active Expired - Fee Related
- 2002-03-28 EP EP02252283A patent/EP1246248A3/en not_active Withdrawn
- 2002-03-29 CN CNB021180431A patent/CN1260804C/zh not_active Expired - Fee Related
- 2002-03-29 US US10/108,648 patent/US6593627B2/en not_active Expired - Fee Related
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7956414B2 (en) | 2004-07-30 | 2011-06-07 | Seiko Epson Corporation | Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate, and method for manufacturing semiconductor device |
| US7351616B2 (en) | 2004-07-30 | 2008-04-01 | Seiko Epson Corporation | Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device |
| JP2008521229A (ja) * | 2004-11-18 | 2008-06-19 | インターナショナル・ビジネス・マシーンズ・コーポレーション | SOI基板材料、及び互いに異なる配向をもつSi含有SOIと下部基板とを形成する方法 |
| US7541258B2 (en) | 2004-12-01 | 2009-06-02 | Seiko Epson Corporation | Method of manufacturing semiconductor substrate and method of manufacturing semiconductor device |
| US7368340B2 (en) | 2005-03-08 | 2008-05-06 | Seiko Epson Corporation | Semiconductor device and method of making semiconductor devices |
| US7425484B2 (en) | 2005-03-09 | 2008-09-16 | Seiko Epson Corporation | Method of manufacturing semiconductor device |
| US7465641B2 (en) | 2005-03-29 | 2008-12-16 | Seiko Epson Corporation | Method for manufacturing a semiconductor device |
| US7294539B2 (en) | 2005-03-29 | 2007-11-13 | Seiko Epson Corporation | Semiconductor substrate, semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device |
| US7316943B2 (en) | 2005-07-13 | 2008-01-08 | Seiko Epson Corporation | Method for manufacturing semiconductor apparatus having drain/source on insulator |
| US7638845B2 (en) | 2005-10-03 | 2009-12-29 | Seiko Epson Corporation | Semiconductor device with buried conductive layer |
| WO2007060895A1 (ja) * | 2005-11-24 | 2007-05-31 | Sony Corporation | 半導体基板、半導体装置および半導体基板の製造方法 |
| US7994574B2 (en) | 2005-11-24 | 2011-08-09 | Sony Corporation | Semiconductor substrate, semiconductor device, and method for manufacturing the semiconductor device |
| US7425495B2 (en) | 2005-12-15 | 2008-09-16 | Seiko Epson Corporation | Method of manufacturing semiconductor substrate and semiconductor device |
| US7847352B2 (en) | 2006-01-18 | 2010-12-07 | Seiko Epson Corporation | Semiconductor device and method for manufacturing the same |
| JP2010141244A (ja) * | 2008-12-15 | 2010-06-24 | Mitsumi Electric Co Ltd | 半導体装置 |
| JP2013042106A (ja) * | 2011-08-12 | 2013-02-28 | Samsung Electronics Co Ltd | 光電集積回路基板及びその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1246248A2 (en) | 2002-10-02 |
| US6593627B2 (en) | 2003-07-15 |
| US20020142507A1 (en) | 2002-10-03 |
| TW533554B (en) | 2003-05-21 |
| CN1379464A (zh) | 2002-11-13 |
| CN1260804C (zh) | 2006-06-21 |
| EP1246248A3 (en) | 2003-12-10 |
| KR20020077158A (ko) | 2002-10-11 |
| KR100579780B1 (ko) | 2006-05-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20041111 |
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| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20041111 |
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| A977 | Report on retrieval |
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| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070403 |
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| A02 | Decision of refusal |
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