JP2002217354A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2002217354A
JP2002217354A JP2001006917A JP2001006917A JP2002217354A JP 2002217354 A JP2002217354 A JP 2002217354A JP 2001006917 A JP2001006917 A JP 2001006917A JP 2001006917 A JP2001006917 A JP 2001006917A JP 2002217354 A JP2002217354 A JP 2002217354A
Authority
JP
Japan
Prior art keywords
bonding wire
semiconductor element
relay member
wiring
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001006917A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002217354A5 (https=
Inventor
Takao Furuumi
貴夫 古海
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2001006917A priority Critical patent/JP2002217354A/ja
Publication of JP2002217354A publication Critical patent/JP2002217354A/ja
Publication of JP2002217354A5 publication Critical patent/JP2002217354A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]

Landscapes

  • Wire Bonding (AREA)
JP2001006917A 2001-01-15 2001-01-15 半導体装置 Pending JP2002217354A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001006917A JP2002217354A (ja) 2001-01-15 2001-01-15 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001006917A JP2002217354A (ja) 2001-01-15 2001-01-15 半導体装置

Publications (2)

Publication Number Publication Date
JP2002217354A true JP2002217354A (ja) 2002-08-02
JP2002217354A5 JP2002217354A5 (https=) 2007-03-08

Family

ID=18874741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001006917A Pending JP2002217354A (ja) 2001-01-15 2001-01-15 半導体装置

Country Status (1)

Country Link
JP (1) JP2002217354A (https=)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004027823A2 (en) 2002-09-17 2004-04-01 Chippac, Inc. Semiconductor multi-package module having wire bond interconnection between stacked packages
JP2004235352A (ja) * 2003-01-29 2004-08-19 Sharp Corp 半導体装置
EP1675179A1 (en) * 2004-12-27 2006-06-28 Shinko Electric Industries Co., Ltd. Stacked-type semiconductor device
JP2007180587A (ja) * 2007-03-29 2007-07-12 Sharp Corp 半導体装置
JP2007214582A (ja) * 2007-03-29 2007-08-23 Sharp Corp 半導体装置およびインターポーザチップ
JP2007324296A (ja) * 2006-05-31 2007-12-13 Toppan Printing Co Ltd Ｉｃチップ貼り合わせ用ｔｃｐ構造体
JP2008016810A (ja) * 2006-06-30 2008-01-24 Hynix Semiconductor Inc スタックパッケージ
JP2008091396A (ja) * 2006-09-29 2008-04-17 Sanyo Electric Co Ltd 半導体モジュールおよび半導体装置
JP2008294483A (ja) * 2008-09-08 2008-12-04 Sharp Corp 半導体装置およびインターポーザチップ
JP2009164653A (ja) * 2009-04-27 2009-07-23 Renesas Technology Corp マルチチップモジュール
CN100521193C (zh) * 2005-12-08 2009-07-29 富士通微电子株式会社 设置在半导体器件中的中继板和半导体器件
JP2009188328A (ja) * 2008-02-08 2009-08-20 Renesas Technology Corp 半導体装置
CN102290401A (zh) * 2010-06-18 2011-12-21 芯光飞株式会社 堆叠多芯片封装结构
US8143100B2 (en) 2002-09-17 2012-03-27 Chippac, Inc. Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1547141A4 (en) * 2002-09-17 2010-02-24 Chippac Inc SEMICONDUCTOR MULTIPLE CAPACITY MODULE WITH WIRE BOND CONNECTION BETWEEN STACKED CAPSULES
JP2013211589A (ja) * 2002-09-17 2013-10-10 Stats Chippac Inc 積み重ねられたパッケージ間のワイヤボンド相互接続を有する半導体マルチパッケージモジュール
WO2004027823A2 (en) 2002-09-17 2004-04-01 Chippac, Inc. Semiconductor multi-package module having wire bond interconnection between stacked packages
US8143100B2 (en) 2002-09-17 2012-03-27 Chippac, Inc. Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages
JP2004235352A (ja) * 2003-01-29 2004-08-19 Sharp Corp 半導体装置
USRE41826E1 (en) 2003-01-29 2010-10-19 Sharp Kabushiki Kaisha Semiconductor device
EP1675179A1 (en) * 2004-12-27 2006-06-28 Shinko Electric Industries Co., Ltd. Stacked-type semiconductor device
CN100521193C (zh) * 2005-12-08 2009-07-29 富士通微电子株式会社 设置在半导体器件中的中继板和半导体器件
JP2007324296A (ja) * 2006-05-31 2007-12-13 Toppan Printing Co Ltd Ｉｃチップ貼り合わせ用ｔｃｐ構造体
JP2008016810A (ja) * 2006-06-30 2008-01-24 Hynix Semiconductor Inc スタックパッケージ
JP2008091396A (ja) * 2006-09-29 2008-04-17 Sanyo Electric Co Ltd 半導体モジュールおよび半導体装置
JP2007214582A (ja) * 2007-03-29 2007-08-23 Sharp Corp 半導体装置およびインターポーザチップ
JP2007180587A (ja) * 2007-03-29 2007-07-12 Sharp Corp 半導体装置
JP2009188328A (ja) * 2008-02-08 2009-08-20 Renesas Technology Corp 半導体装置
JP2008294483A (ja) * 2008-09-08 2008-12-04 Sharp Corp 半導体装置およびインターポーザチップ
JP2009164653A (ja) * 2009-04-27 2009-07-23 Renesas Technology Corp マルチチップモジュール
CN102290401A (zh) * 2010-06-18 2011-12-21 芯光飞株式会社 堆叠多芯片封装结构

Similar Documents

Publication Publication Date Title
US9258899B2 (en) Method of fabricating a wiring board
JP3722209B2 (ja) 半導体装置
JP4790297B2 (ja) 半導体装置およびその製造方法
US6876074B2 (en) Stack package using flexible double wiring substrate
JP3546131B2 (ja) 半導体チップパッケージ
JP2936320B2 (ja) 半導体パッケージ
US7405486B2 (en) Circuit device
JP2005209689A (ja) 半導体装置及びその製造方法
JP2017038075A (ja) エリアアレイユニットコネクタを備えるスタック可能モールド超小型電子パッケージ
JP2005327984A (ja) 電子部品及び電子部品実装構造の製造方法
JP2002110898A (ja) 半導体装置
JP2001217337A (ja) 半導体装置及びその製造方法
JP2005294451A (ja) 半導体集積回路の製造方法および半導体集積回路ならびに半導体集積回路装置
JP2002217354A (ja) 半導体装置
JPH09232508A (ja) パターン金属層と絶縁層を積層してなるリードフレームを用いたマルチチップパッケージ
JP4775007B2 (ja) 半導体装置及びその製造方法
JPH05218042A (ja) 半導体装置
US20090115036A1 (en) Semiconductor chip package having metal bump and method of fabricating same
CN116798993A (zh) 封装结构及其形成方法
CN117276260A (zh) 模块化半导体器件及包含该器件的电子器件
US20050224934A1 (en) Circuit device
JP2003332515A (ja) 半導体集積回路装置およびその製造方法
JP3757766B2 (ja) 半導体装置及びその製造方法、並びに電子機器
JP2004087936A (ja) 半導体装置及び半導体装置の製造方法並びに電子機器
JP3490601B2 (ja) フィルムキャリアおよびそれを用いた積層型実装体

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070118

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070118

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20081125

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090929

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20100216