JP2002217354A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with a reduction in the risk that bonding wires are short-circuited and an improvement in reliability. SOLUTION: The semiconductor device 201 comprises a wiring board 106, a lower-stage semiconductor device 107 stuck onto the wiring board 106, a wiring relay member 206 stuck onto the lower-stage semiconductor device 107, an upper-stage semiconductor device 108 stuck onto the wiring relay member 206, a first bonding wire 203 for electrically connecting the wiring board 106 and the lower-stage semiconductor device 107, a second bonding wire 207 for electrically connecting the upper-stage semiconductor device 108 and the wiring relay member 206, a third bonding wire 204 for electrically connecting the wiring relay member 206 and the wiring board 106, and a sealing resin 110 for sealing the first to third bonding wires 204. In the semiconductor device 201, the wiring relay member 206 electrically connects the second bonding wire 207 and the third bonding wire 204.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a semiconductor device in which a plurality of semiconductor elements are stacked. More specifically, in a semiconductor device in which a plurality of semiconductor elements are stacked, the present invention relates to a technique useful for preventing short-circuiting between bonding wires provided in the semiconductor device and improving reliability of the semiconductor device. .

[0002]

2. Description of the Related Art A semiconductor device in which a plurality of semiconductor elements are stacked (hereinafter, referred to as a stacked semiconductor device) is conventionally used when a logic and a memory are mounted together or when the memory capacity of the semiconductor device is increased. I have. The stack type semiconductor device according to this conventional example will be described with reference to FIGS. FIG. 12 is a cross-sectional view of a conventional stack type semiconductor device.

As shown in FIG. 12, a conventional stacked semiconductor device 101 generally includes a wiring board 106.
It has a structure in which a lower semiconductor element 107 and an upper semiconductor element 108 are stacked on top. Upper semiconductor element 108
Is an adhesive 109 on the electrode terminal forming surface of the lower semiconductor element.
And the size of the lower semiconductor element 107
Less than. Then, the surface of the lower semiconductor element 107 opposite to the electrode terminal forming surface is connected to the wiring substrate 1
06.

The lower semiconductor element 107 and the upper semiconductor element 108 may be different kinds of semiconductor elements such as a logic and a memory, and both are composed of a memory in order to provide a memory device having a large capacity. In some cases.
On the other hand, the wiring board 106 is composed of a polyimide tape 103, a wiring layer 105, a solder resist 104, and solder bumps 102, 102,.
The wiring layer 105 is made of copper, and is formed on the semiconductor element mounting surface side of the polyimide tape 103. The via holes 103 are provided in the polyimide tape 103.
are opened, and the via holes 103a, 103a,.
Solder bumps 102, 102, which are external connection terminals
・ Fixed. These solder bumps 102, 10
2, ... are via holes 103a, 103a, ...
Through the wiring layer 105. The solder bumps 102, 102,... Are in contact with a mounting board (not shown).
By reflowing 2, 102,..., The stacked semiconductor device 101 is mounted on the mounting substrate.

.. Are lower bonding wires for electrically connecting the lower semiconductor element 107 and the wiring board 106. One end of each of the lower bonding wires 111, 111,... Is connected to an electrode 107 formed on an electrode terminal forming surface of the lower semiconductor element 107.
a, 107a,... are bonded on top. The other end is bonded onto an electrode pad 105a formed on the wiring layer 105.

Similarly, 112, 112,... Are upper bonding wires for electrically connecting the upper semiconductor element 108 and the wiring board 106. One end of each of the upper bonding wires 112, 112,... Is connected to an electrode 108 formed on an electrode terminal forming surface of the upper semiconductor element 108.
, and the other end is bonded to an electrode pad 105b formed on the wiring layer 105.

The lower bonding wire 11
.. And upper bonding wire 11
Each of 2, 112,... Is made of a gold wire. The constituent members on the semiconductor element mounting surface side of the wiring substrate 106 are molded resin 110 during transfer molding.
To prevent exposure to the outside air.

[0008]

The stacked semiconductor device 101 according to this conventional example will be further described with reference to FIG. FIG. 13 is a top view of the stack type semiconductor device 101, and FIG.
It is a sectional view equivalent to a section. In FIG. 13, the mold resin 110 is omitted for convenience of explanation.

As can be seen from FIGS. 12 and 13, the length of the upper bonding wire 112 is longer than the length of the lower bonding wire 111. However, if the length of the upper bonding wire 112 is long, the upper bonding wire 112 is deformed by the pressure of the molding resin 110 during transfer molding, and the upper bonding wire 112 and the lower bonding wire 111 may be short-circuited. Will be higher.

Further, as can be seen from FIG. 13, the lower bonding wire 111 and the upper bonding wire 112
Cross each other when viewed from the height direction (this state is hereinafter referred to as a three-dimensional intersection). However, the lower bonding wire 111 and the upper bonding wire 112
In this way, the distance between the lower bonding wire 111 and the upper bonding wire 112 at the intersection (see FIG. 13) becomes shorter, so that the possibility of occurrence of the above short circuit is further increased.

As described above, the lower bonding wire 111
If there is a risk of short-circuit between the semiconductor device and the upper bonding wire 112, the reliability of the stacked semiconductor device 101 is significantly reduced. The present invention has been made in view of the problems of the conventional example, and has as its object to provide a semiconductor device in which the risk of short-circuiting between bonding wires is reduced and reliability is improved. .

[0012]

According to the first aspect of the present invention, there is provided a wiring board having an external connection terminal provided on one surface and a bonding pad provided on the other surface; A lower semiconductor element fixed to the other surface;
A wiring relay member fixed on the lower semiconductor element and smaller than the size of the lower semiconductor element; an upper semiconductor element fixed on the wiring relay member and smaller than the size of the wiring relay member; A first bonding wire electrically connected to the pad and the lower semiconductor element; a second bonding wire electrically connected to the upper semiconductor element and the wiring relay member; and the wiring relay member. A third bonding wire electrically connected to the bonding pad; and a sealing resin in which at least the first bonding wire, the second bonding wire, and the third bonding wire are sealed. And the second bonding wire and the third bonding wire are electrically connected via the wiring relay member. Solved by a semiconductor device, characterized in that connection has been.

According to a second aspect of the present invention, there is provided a wiring board having an external connection terminal provided on one surface and a bonding pad provided on the other surface, and a lower semiconductor fixed to the other surface of the wiring substrate. An element, a wiring relay member fixed on the lower semiconductor element, smaller than the size of the lower semiconductor element, and having an opening or notch formed in the thickness direction; and an opening or notch of the wiring relay member. An upper semiconductor element fixed to an upper surface portion of the lower semiconductor element exposed from a portion, a first bonding wire electrically connected to the bonding pad and the lower semiconductor element,
A second bonding wire in which the upper semiconductor element and the wiring relay member are electrically connected; a third bonding wire in which the wiring relay member and the bonding pad are electrically connected; A sealing resin in which the first bonding wire, the second bonding wire, and the third bonding wire are sealed, and the second bonding wire is connected to the third bonding via the wiring relay member. The problem is solved by a semiconductor device characterized by being electrically connected to a wire.

According to a third aspect of the present invention, the wiring relay member is provided with a relay bonding pad to which one end of the third bonding wire is bonded, and the relay bonding pad is connected to the first bonding wire. The problem is solved by the semiconductor device according to the first invention or the second invention, wherein the wire and the third bonding wire are arranged so as not to cross three-dimensionally.

According to a fourth aspect of the present invention, there is provided a wiring substrate having external connection terminals provided on one surface and bonding pads provided on the other surface, and a wiring relay fixed to the other surface of the wiring substrate. A member, fixed on the wiring relay member, a lower semiconductor element smaller than the size of the wiring relay member, and an upper semiconductor element fixed on the lower semiconductor element, smaller than the size of the lower semiconductor element. A first bonding wire electrically connected to the bonding pad and the lower semiconductor element, a second bonding wire electrically connected to the upper semiconductor element and the wiring relay member, and the wiring A third bonding wire in which a relay member and the bonding pad are electrically connected; at least the first bonding wire and the second bonding wire; And a sealing resin in which the third bonding wire is sealed, and the second bonding wire and the third bonding wire are electrically connected via the wiring relay member. The problem is solved by a semiconductor device characterized by the following.

According to a fifth aspect of the present invention, there is provided a wiring substrate having external connection terminals provided on one surface and bonding pads provided on the other surface, and a lower semiconductor fixed to the other surface of the wiring substrate. An element, an upper semiconductor element fixed on the lower semiconductor element, an upper semiconductor element smaller than the size of the lower semiconductor element, and a wiring relay member fixed on the upper semiconductor element, smaller than the size of the upper semiconductor element. A first bonding wire electrically connected to the bonding pad and the lower semiconductor element, a second bonding wire electrically connected to the upper semiconductor element and the wiring relay member, and the wiring A third bonding wire in which a relay member and the bonding pad are electrically connected, at least the first bonding wire, and the second bonding wire; And a sealing resin in which the third bonding wire is sealed, and the second bonding wire and the third bonding wire are electrically connected via the wiring relay member. The problem is solved by a semiconductor device characterized by that.

According to a sixth aspect of the present invention, in the wiring relay member, a relay bonding pad to which one end of the third bonding wire is bonded is provided, and the relay bonding pad is connected to the first bonding wire. According to a fourth aspect of the present invention, there is provided a semiconductor device according to the fourth or fifth aspect, wherein the wire and the third bonding wire are arranged so as not to cross three-dimensionally.

Alternatively, in the seventh invention, the lower semiconductor element and the wiring relay member are electrically connected by a fourth bonding wire, and the lower semiconductor element and the upper semiconductor element are connected via the wiring relay member. The problem is solved by the semiconductor device according to any one of the first to sixth aspects, wherein the element is electrically connected to the element. Alternatively, the eighth invention is characterized in that the wiring relay member is a silicon pellet, a resin substrate or a ceramic substrate, or a resin film provided with a wiring layer. The problem is solved by the semiconductor device according to any one of the above.

Next, the operation of the present invention will be described. According to the semiconductor device of the present invention, there is provided a wiring board having external connection terminals provided on one surface and bonding pads provided on the other surface. A lower semiconductor element is fixed to the other surface of the wiring board, and a wiring relay member is fixed to the lower semiconductor element. This wiring relay member has a plate-like shape, and its size is smaller than the size of the lower semiconductor element. The upper semiconductor element having a size smaller than that of the wiring relay member is fixed on the wiring relay member.

Further, the bonding pads of the wiring board and the lower semiconductor element are electrically connected by first bonding wires. The upper semiconductor element and the wiring relay member are electrically connected by a second bonding wire. Further, the bonding pad of the wiring board and the wiring relay member are electrically connected by a third bonding wire. These first to third bonding wires are sealed with a sealing resin.

Then, the second bonding wire and the third bonding wire
Are electrically connected by the wiring relay member. According to this, the electrical connection between the upper semiconductor element and the wiring board is not performed by bonding the upper bonding wire between them as in the related art, but by interposing the wiring relay member between them. Done. That is, after the second bonding wire is dropped from the upper semiconductor element to the wiring relay member, the third bonding wire is dropped again from the wiring relay member to the wiring board.

In this case, the length of the third bonding wire is shorter than that of the upper bonding wire according to the conventional example. Therefore, the amount of deformation of the third bonding wire due to the pressure of the sealing resin during transfer molding is reduced, and the risk that the third bonding wire is short-circuited with the first bonding wire is reduced.

According to another semiconductor device of the present invention, an opening or notch is formed in a thickness direction of the wiring relay member, and an upper surface portion of the lower semiconductor element exposed from the opening or notch. Then, the upper semiconductor element is fixed. This reduces the thickness of the semiconductor device by the thickness of the upper semiconductor element.

Further, according to another semiconductor device of the present invention, the wiring relay member is provided with a relay bonding pad to which one end of the third bonding wire is bonded. The relay bonding pad is arranged such that the first bonding wire and the third bonding wire do not cross each other three-dimensionally.

According to this, since the first bonding wire and the third bonding wire do not cross three-dimensionally,
At the time of transfer molding, the risk that the third bonding wire is deformed by the pressure of the sealing resin and short-circuited to the first bonding wire is further reduced. According to still another semiconductor device of the present invention, the lower semiconductor element and the wiring relay member are electrically connected by the fourth bonding wire, and the lower semiconductor element and the upper semiconductor element are connected to each other via the wiring relay member. The semiconductor element is electrically connected.

With this configuration, the number of wirings on the wiring board for electrically connecting the lower semiconductor element and the upper semiconductor element is reduced, and the wiring is prevented from extending in the lateral direction of the wiring board. Is reduced in size. Instead of fixing the wiring relay member on the lower semiconductor element as described above, the wiring relay member may be fixed on the wiring board or the upper semiconductor element. Also in this case, a relay bonding pad is provided on the wiring relay member, and the relay bonding pad is arranged so that the first bonding wire and the third bonding wire do not cross each other three-dimensionally.

According to this, as described above, the first
The risk of short circuit between the bonding wire and the third bonding wire during transfer molding is reduced.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a semiconductor device according to an embodiment of the present invention will be described in detail with reference to FIGS. 1 to 11, the same components as those of the conventional example are denoted by the same reference numerals as those of the conventional example. (1) First Embodiment First, a semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a sectional view of the semiconductor device according to the present embodiment, and FIG. 2 is a top view thereof.

As shown in FIG. 1, a semiconductor device 201 according to this embodiment includes a wiring board 106, a lower semiconductor element 10
7, a wiring relay member 206, and an upper semiconductor element 108. Among them, a known substrate may be used as the wiring board 106. For example, a tape BGA (B
A wiring board for all-grid-array is used. Alternatively, a rigid wiring board formed by forming a wiring layer on a core base material made of glass epoxy resin or ceramic may be used as the wiring board 106, or a multilayer wiring board may be used as the wiring board. It may be used as 106. In the following, a tape BG is used as the wiring board 106.
The case where the wiring board for A is used will be described.

The wiring board 106 has, on one surface (mounting surface), the solder bumps 102, 1 as external connection terminals.
02,... This solder bump 102,
, Are wiring layers 10 via via holes 103a, 103a,.
5 is electrically connected. The wiring layer 105 is formed by bonding a copper foil to the surface of the polyimide film 103 and patterning the copper foil.

A bonding pad 105a to be described later is formed on the wiring layer 105. The surface of the wiring layer 105 other than the bonding pad 105a is protected by the solder resist 104. When the solder bumps 102, 102,... Are in contact with a mounting board (not shown),
., The semiconductor device 201 is electrically and mechanically connected to the mounting substrate.

On the other hand, on the other surface (on the semiconductor element mounting surface) of the wiring substrate 106, the surface opposite to the electrode terminal forming surface of the lower semiconductor element 107 is bonded via an adhesive 109. A wiring relay member 206 is fixed on the electrode terminal forming surface of the lower semiconductor element 107 via an adhesive 109. As illustrated, the wiring relay member 206 has a plate-like shape. Since the size is smaller than the size of the lower semiconductor element 107, there is a portion on the electrode terminal formation surface of the lower semiconductor element 107 that is not covered by the wiring relay member 206. This part includes the electrode terminals 10
Are formed, and one ends of first bonding wires 203, 203,... Are bonded to the electrode terminals 107a, 107a,. Then, the first bonding wire 20
The other ends of 3, 203,... Are bonded to bonding pads 105a, 105a,. Wiring board 106 and lower semiconductor element 107
Are the first bonding wires 203, 203,.
··· will be electrically connected via

On the other hand, the second bonding wire 207 and the third bonding wire 2
04 is bonded to one end of each of the second bonding wires 20.
7 functions to electrically connect the third bonding wire 204 to the third bonding wire 204. The other end of the third bonding wire 204 is bonded to the bonding pad 105a of the wiring board 106, so that the wiring relay member 206 and the wiring board 106 are electrically connected.

Examples of the wiring relay member 206 functioning as described above include a silicon pellet, a rigid wiring substrate (a resin substrate or a ceramic substrate), and a resin film having a wiring layer. These will be described below. Silicon Pellet A silicon pellet is formed by forming an insulating film such as a silicon oxide film on a silicon substrate and forming a wiring layer made of aluminum or copper on the insulating film. To produce the silicon pellet, first, a silicon oxide film is formed on a silicon wafer by a CVD method (chemical vapor deposition) or thermal oxidation. Next, a metal layer made of aluminum or copper is formed on the silicon oxide film by sputtering or copper plating of aluminum. Thereafter, the metal layer is patterned to form a wiring layer, and finally, a silicon pellet is completed by dicing the silicon wafer. All of these can be performed using a known technique.

Rigid wiring substrate (resin substrate or ceramic substrate) A rigid wiring substrate (also referred to as a resin substrate or ceramic substrate) is formed on a relatively hard (rigid) core material such as glass epoxy resin or ceramic. , A wiring substrate formed with a wiring layer. This wiring layer is made of copper, and it may be a single layer or may be stacked in multiple layers via an interlayer insulating layer. In the case of a multilayer, for example, a photosensitive polyimide resin, a non-photosensitive polyimide resin, an epoxy resin, or the like is used as the interlayer insulating layer. Regardless of whether the wiring layer is a single layer or a multilayer, a rigid wiring board can be manufactured by a known technique.

Resin film provided with a wiring layer This is formed by forming a wiring layer on a resin film such as a polyimide film, and is conventionally used for a tape BGA or the like. The wiring layer is formed by bonding a copper foil on a resin film and patterning the copper foil. The resin film provided with this wiring layer is thinner than a rigid wiring board or a silicon pellet, and thus is suitable for reducing the thickness of the semiconductor device 201. The resin film on which the wiring layer is formed can be manufactured by a known technique.

Although the examples of the wiring relay member have been described above, a case where a silicon pellet is used as the wiring relay member 206 will be described below. Figure 1
In the figure, 202 indicates a silicon substrate, and 205 indicates the wiring layer described in the above. In FIG. 1,
1 does not show the silicon oxide film described in FIG. Also, 2
Reference numeral 05a denotes a relay bonding pad formed on the wiring layer 205.
a, the second bonding wire 207 and the third
Is bonded to one end of each bonding wire 204.

The advantage of using a silicon pellet as the wiring relay member 206 is that the pattern of the wiring layer 205 can be made much finer as compared with the above-mentioned rigid wiring board or resin film having a wiring layer. is there. Further, the fact that the strength of the silicon substrate 202 is relatively strong is also an advantage in the case where a silicon pellet is used as the wiring relay member 206.

The upper semiconductor element 1 smaller than the size of the wiring relay member 206 is placed on the wiring relay member 206.
08 is fixed. This fixing is performed by the wiring relay member 20.
This is performed by applying an adhesive 109 on the upper surface 6 and bonding the surface opposite to the electrode terminal forming surface of the upper semiconductor element 108 to the wiring relay member 206 via the adhesive 109. The electrode terminals 108a, 108a,... Are formed on the electrode terminal formation surface of the upper semiconductor element 108. The electrode terminals 108a, 108a,. Is bonded. The second bonding wire 207 is for electrically connecting the upper semiconductor element 108 and the wiring relay member 206.

The first bonding wire 20
Each of the third, second bonding wire 207, and third bonding wire 204 is made of a gold wire, and is sealed with a molding resin 110 (sealing resin). In the present embodiment, the upper semiconductor element 1
08 and the wiring board 106 are not electrically connected by bonding the upper bonding wire 112 (see FIG. 12) between them as in the related art, but by interposing a wiring relay member 206 between them. Done. That is, after the second bonding wire 207 is dropped from the upper semiconductor element 108 to the wiring relay member 206 once, the third bonding wire 204 is dropped from the wiring relay member 206 to the wiring board 106 again.

In this case, the third bonding wire 112 (see FIG. 12) according to the conventional example is made third
Of the bonding wire 204 can be shortened. Therefore, at the time of transfer molding, the third bonding wire 2
Since the deformation amount of the third bonding wire 204 can be reduced since the amount of deformation of
Danger of short-circuiting with the bonding wire 203 can be reduced. As a result, the reliability of the semiconductor device 201 can be improved as compared with the related art.

Next, the description of the semiconductor device 201 according to this embodiment will be continued with reference to FIG. FIG. 2 is a top view of the semiconductor device 201, but the above-described mold resin 110 is omitted for convenience of explanation. FIG. 1 is a cross-sectional view corresponding to the cross section taken along the line AB in FIG. FIG. 2 shows a wiring pattern of the wiring layer 205 of the wiring relay member 206. As can be seen, the bonding pads 205a for relay are formed at both ends of the wiring pattern, and one end of each of the second bonding wire 207 and the third bonding wire 204 is placed on the bonding pad 205a for relay. Bonded.

Here, the third bonding wire 204
Bonding pad 2 to which is bonded
05a, the relay bonding pad 20
5a is arranged such that the third bonding wire 204 does not cross the first bonding wire 203 in three dimensions. This further reduces the risk that the third bonding wire 204 and the first bonding wire 203 are short-circuited during transfer molding, as compared with the conventional example in which the bonding wires cross three-dimensionally (see FIG. 13). Can be reduced. Thus, the reliability of the semiconductor device 201 can be further improved.

In the present embodiment, a silicon pellet is used as the wiring relay member 206, but a multilayer wiring board may be used as the wiring relay member 206 instead. When the multilayer wiring board is used as the wiring relay member 206, wiring more complicated than the silicon pellet can be performed by the wiring relay member 206, so that the degree of freedom of wiring of the wiring relay member 206 increases, and the relay bonding pads 205a, .. 205a can be freely changed. This allows the position of the third bonding wire 204 to be freely changed within a range that does not cross the first bonding wire 203 in a three-dimensional manner.

As described above, according to the semiconductor device 201 of the present embodiment, the electrical connection between the upper semiconductor element 108 and the wiring board 106 is made via the wiring relay member 206, so that the third bonding wire Since the length of the second bonding wire 204 can be shortened, the risk of a short circuit between the third bonding wire 204 and the first bonding wire 203 during transfer molding can be reduced.

In addition, the wiring relay member 206 allows the first
3D so as not to cross the bonding wire 203
Can be arranged. Thereby, the third bonding wire 20
4 and the first bonding wire 203 can be further reduced in danger of short circuit. From the above points, the semiconductor device 201 according to the present embodiment has improved reliability as compared with the related art.

(2) Second Embodiment Next, a semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS. FIG.
FIG. 3 is a top view of the semiconductor device according to the present embodiment, and FIG.
It is AB sectional drawing of FIG. In FIG. 4, the mold resin 110 shown in FIG. 3 is omitted for convenience of explanation.

This embodiment includes the features of the first embodiment, and the components, operations, and effects described in the first embodiment will be omitted below. As shown in FIG. 3, the semiconductor device 301 according to the present embodiment is different from the first embodiment in that the lower semiconductor element 107 and the wiring relay member 206 are electrically connected by the fourth bonding wire 302. It is a point that was done. One end of the fourth bonding wire 302 is connected to the lower semiconductor element 1.
07 is bonded to the electrode terminal 107a, and the other end is bonded to the relay bonding pad 205a on the wiring relay member 206.

In the first embodiment, since the fourth bonding wire 302 is not provided, the electrical connection between the lower semiconductor element 107 and the upper semiconductor element 108 is made in the wiring board 106. On the other hand, in the present embodiment, the fourth bonding wire 302
With this configuration, a part of the electrical connection between the lower semiconductor element 107 and the upper semiconductor element 108 can be partially borne by the wiring relay member 206. As a result, the amount of wiring on the wiring board 106 can be reduced, so that the wiring layer 105 can be prevented from extending in the horizontal direction, and the size of the wiring board 106 can be reduced.

In particular, when a multilayer wiring board is used as the wiring relay member 206, complicated wiring can be performed in the wiring relay member 206, so that the burden of the electrical connection on the wiring relay member 206 can be further increased. In addition, the amount of wiring on the wiring board 106 can be further reduced. (3) Third Embodiment Next, a semiconductor device according to a third embodiment of the present invention will be described with reference to FIGS. FIG.
FIG. 5 is a top view of the semiconductor device according to the present embodiment, and FIG.
It is AB sectional drawing of FIG. 6, the mold resin 110 shown in FIG. 3 is omitted for convenience of explanation.

The present embodiment includes the features of the first embodiment, and the components, operations, and effects described in the first embodiment will be omitted below. As shown in FIG. 5, the semiconductor device 40 according to the present embodiment
1 is different from the first embodiment in that
6 is provided with an opening 206a, and the upper semiconductor element 108 is fixed to the upper surface of the lower semiconductor element 107 exposed from the opening 206a.

As shown in FIGS. 7A to 7C, a notch 206b may be provided in the wiring relay member 206 instead of the opening 206a. FIGS. 7 (a) to 7 (c)
FIG. 9 is a perspective view for explaining another example of the wiring relay member 206. In these drawings, bonding wires and a molding resin are omitted to make the shape of the wiring relay member 206 easy to see.

As described above, the opening 206a and the notch 206
By providing b, the thickness of the semiconductor device 401 can be reduced by the thickness of the upper semiconductor element 108. This contributes to miniaturization of electronic devices that have been required in recent years. The semiconductor device 401 does not include the fourth bonding wire 302 described in the second embodiment, but may include the fourth bonding wire 302.
As described in the third embodiment, when the fourth bonding wire is used, the amount of wiring in the wiring board 106 can be reduced, and the size of the wiring board can be reduced. The use of a multilayer wiring board as the wiring relay member 206 further enhances the above-described effect, as described in the second embodiment.

(4) Fourth Embodiment Next, a semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIGS. FIG.
FIG. 8 is a top view of the semiconductor device according to the present embodiment, and FIG.
It is AB sectional drawing of FIG. In FIG. 9, the mold resin 110 shown in FIG. 3 is omitted for convenience of explanation. In the present embodiment, the first to third
The same reference numerals as those described in the above embodiments denote the same members, and a description thereof will be omitted.

As shown in FIG. 8, the semiconductor device 501 according to the present embodiment differs from the first to third embodiments in that the wiring relay member 206 is fixed on the wiring board 106. The wiring relay member 206 is made of the adhesive 10
9 adheres on the wiring board 106. An adhesive 109 is applied on the wiring relay member 206, and the lower semiconductor element 1
The surface opposite to the electrode terminal forming surface of 07 is bonded on the wiring relay member 206. As shown, the lower semiconductor element 10
The size of 7 is smaller than the size of the wiring relay member 206.

On the electrode terminal forming surface of the lower semiconductor element 107, the surface opposite to the electrode terminal forming surface of the upper semiconductor element 108 is bonded via an adhesive 109. As illustrated, the size of the upper semiconductor element 108 is smaller than the size of the lower semiconductor element 107. Therefore, the upper semiconductor element 108 is provided on the electrode terminal formation surface of the lower semiconductor element 107.
Some parts are not covered with. In such a portion, electrode terminals 107a, 107a,... Are formed,
One ends of first bonding wires 203, 203,... Are bonded to the electrode terminals 107a, 107a,.

Reference numeral 502 denotes a bonding wire for directly electrically connecting the upper semiconductor element 108 and the wiring board 106. As described in the first embodiment, the electrical connection between the lower semiconductor element 107 and the wiring board 106 is established by the first bonding wires 203, 203,.
Is performed via Further, as described in the first embodiment, the second bonding wires 207, 20
, The upper semiconductor element 108 and the wiring relay member 206 are electrically connected, and the third bonding wires 204, 204,.
And the wiring board 106 are electrically connected.

The wiring relay member 206 functions to electrically connect the second bonding wires 207, 207,... And the third bonding wires 204, 204,. Therefore, the third bonding wire 204 is connected to the upper semiconductor element 108 and the wiring board 1 similarly to the upper bonding wire 112 according to the conventional example.
06 is electrically connected.

Next, the description of the semiconductor device 501 will be continued with reference to FIG. As shown in FIG. 9, the wiring relay member 2
06, the relay bonding pad 2
05a, 205a,... Are formed. One end of each of the second bonding wire 207 and the third bonding wire 204 is bonded to the relay bonding pads 205a, 205a,.

In particular, the relay bonding pad 20 to which the third bonding wire 204 is bonded
Reference numeral 5a denotes a position where the third bonding wire 204 does not cross the first bonding wire 203 in three dimensions. This further reduces the risk of short-circuiting between the first bonding wire 203 and the third bonding wire 204 during transfer molding, and further improves the reliability of the semiconductor device 501.

Further, as shown in FIG. 9, the lower semiconductor element 107 and the wiring relay member 206 are electrically connected by a fourth bonding wire 302. The fourth bonding wire 302 is the same as that described in the second embodiment.
A part of the electrical connection between the wiring board 106 and the upper semiconductor element 108 can be made by the wiring relay member 206,
Can be reduced, and the size of the wiring board 106 can be reduced.

(5) Fifth Embodiment Next, a semiconductor device according to a fifth embodiment of the present invention will be described with reference to FIGS. Figure 1
1 is a top view of the semiconductor device according to the present embodiment, and FIG. 10 is a cross-sectional view taken along a line AB in FIG. In FIG. 11, the mold resin 110 shown in FIG. 10 is omitted for convenience of explanation. Further, in the present embodiment, the same reference numerals as those in the first to fourth embodiments denote the same constituent members, and a description thereof will be omitted.

As shown in FIG. 10, the semiconductor device 601 according to this embodiment is different from the first to fourth embodiments in that the wiring relay member 206 is placed on the upper semiconductor element 108.
Is fixed. As shown, a lower semiconductor element 107 is fixed on the wiring board 106, and an upper semiconductor element 108 is further fixed on the lower semiconductor element 107. The lower semiconductor element 107 has the surface opposite to the electrode terminal forming surface bonded to the wiring board 106 via an adhesive 109. Further, the upper semiconductor element 108 is bonded to the electrode terminal forming surface of the lower semiconductor element 107 via an adhesive 109 on the surface opposite to the electrode terminal forming surface.

Since the size of the upper semiconductor element 108 is smaller than the size of the lower semiconductor element 107, the upper semiconductor element 108
Some parts are not covered with. In this portion, electrode terminals 107a, 107a,... Are formed, and one ends of first bonding wires 203 are bonded to the electrode terminals 107a, 107a,.

Similarly, since the size of the wiring relay member 206 is smaller than the size of the upper semiconductor element 108, the wiring relay member 20 is provided on the electrode terminal forming surface of the upper semiconductor element 108.
6 are not covered. In this portion, electrode terminals 108a, 108a,... Are formed. Next, the description of the semiconductor device 601 will be continued with reference to FIG.

As shown in FIG. 11, the wiring relay member 2
06, the relay bonding pad 2
Are formed. One end of a second bonding wire 207 is bonded to the relay bonding pads 205a, 205a,. Then, the second bonding wire 20
7 is connected to the electrode terminal 108 of the upper semiconductor element 108.
a, 108a,... Thus, the upper semiconductor element 108 and the wiring relay member 206
Are electrically connected via a second bonding wire 207. 602 is the upper semiconductor element 10
8 is a bonding wire for directly electrically connecting the wiring board 8 and the wiring board 106.

The above-mentioned relay bonding pad 2
Further, one end of a third bonding wire 204 is bonded to each of 05a, 205a,. The other end of the third bonding wire 204 is connected to the wiring board 1
06 bonding pads 105a, 105a,...
To the wiring relay member 206 and the wiring board 106 via the third bonding wire 204.
And are electrically connected. Then, the second bonding wire 207 and the third bonding wire 20
4 is electrically connected via the wiring layer 205 of the wiring relay member 206. Therefore, the third bonding wire 204 is the upper bonding wire 11 according to the conventional example.
As in FIG. 2 (see FIG. 12), the upper semiconductor element 108 and the wiring board 106 are electrically connected.

Here, the third bonding wire 2
Attention is paid to the relay bonding pad 205a to which the wire 04 is bonded. As shown in the drawing, the relay bonding pad 205a is arranged such that the third bonding wire 204 does not cross the first bonding wire 203 in three dimensions. Therefore, even if the third bonding wire 204 is deformed by the pressure of the mold resin 110 (see FIG. 10) during transfer molding, there is a risk that the third bonding wire will short-circuit with the first bonding wire 203. And the reliability of the semiconductor device 601 is improved.

Although the semiconductor device 601 does not include the fourth bonding wire 302 described in the second embodiment, the fourth bonding wire 302
May be provided. As described in the third embodiment,
When the fourth bonding wires 302 are used, the amount of wiring on the wiring board 106 can be reduced, and the size of the wiring board can be reduced. Then, the wiring relay member 20
As described in the second embodiment, when the multilayer wiring board is used as 6, the above effect is further enhanced.

[0070]

As described above, according to the semiconductor device of the present invention, the wiring relay member is fixed on the lower semiconductor element, and the upper semiconductor element is fixed on the wiring relay member. According to this, the length of the third bonding wire can be shorter than that of the lower bonding wire according to the conventional example. Therefore, the risk of the third bonding wire being short-circuited to the first bonding wire during transfer molding is reduced, so that the reliability of the semiconductor device can be improved.

Further, when an opening or notch is provided in the wiring relay member and the upper semiconductor element is fixed to the upper surface of the lower semiconductor element exposed to the opening or notch, the semiconductor may be as thick as the upper semiconductor element. The thickness of the device can be reduced. Further, a relay bonding pad may be provided on the wiring relay member, and the relay bonding pad may be arranged so that the first bonding wire and the third bonding wire do not cross each other three-dimensionally. With this configuration, the risk of the short circuit is further reduced, and the reliability of the semiconductor device can be further improved.

The wiring relay member may be provided not on the lower semiconductor element but on the wiring board or the upper semiconductor element. In this case, the risk of the short circuit is reduced by arranging the relay bonding pads so that the first bonding wire and the third bonding wire do not cross each other three-dimensionally.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a top view of the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a top view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a top view of a semiconductor device according to a third embodiment of the present invention.

FIG. 7 is a cross-sectional view for explaining another example of the wiring relay member in the third embodiment of the present invention.

FIG. 8 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 9 is a top view of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 10 is a sectional view of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 11 is a top view of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 12 is a sectional view of a stacked semiconductor device according to a conventional example.

FIG. 13 is a top view of a stacked semiconductor device according to a conventional example.

[Explanation of symbols]

101, 201, 301, 401, 501, 601 ...
・ Semiconductor device, 102 ... Solder bump, 103 ... Polyimide film, 103a ... Via hole, 104 ... Solder resist, 105 ... Wiring layer on polyimide film, 105a ... Pad, 106: wiring board, 107: lower semiconductor element, 107a: electrode terminal of lower semiconductor element, 108: upper semiconductor element, 108a: electrode terminal of upper semiconductor element, 109 ...・ Adhesive, 110 ・ ・ ・ Mold resin, 111 ・ ・ ・ Lower bonding wire, 112 ・ ・ ・ Upper bonding wire, 202 ・ ・ ・ Silicon substrate, 203 ・ ・ ・ First bonding wire, 204 ・ ・ ・ Third Bonding wire 205, a wiring layer formed on a silicon substrate, 205a relay Bonding pad, 206: wiring relay member, 206a: opening of wiring relay member, 206b: notch of wiring relay member, 207: second bonding wire 502, 602: bonding wire .

Claims (8)

[Claims] A wiring board having external connection terminals provided on one surface and bonding pads provided on the other surface; a lower semiconductor element fixed to the other surface of the wiring board; and a lower semiconductor element. A wiring relay member fixed to the upper side, smaller than the size of the lower semiconductor element; an upper semiconductor element smaller than the size of the wiring relay member, fixed to the wiring relay member; the bonding pad and the lower step A first bonding wire electrically connected to the semiconductor element, a second bonding wire electrically connected to the upper semiconductor element and the wiring relay member, the wiring relay member and the bonding pad, A third bonding wire electrically connected to at least the first bonding wire, the second bonding wire, and A sealing resin in which the third bonding wire is sealed, wherein the second bonding wire and the third bonding wire are electrically connected via the wiring relay member. Semiconductor device. 2. A wiring board having an external connection terminal provided on one surface and a bonding pad provided on the other surface, a lower semiconductor element fixed to the other surface of the wiring board, and the lower semiconductor element A wiring relay member fixed above and smaller than the size of the lower semiconductor element and having an opening or notch formed in the thickness direction; and the lower semiconductor exposed from the opening or notch of the wiring relay member. An upper semiconductor element fixed to an upper surface portion of the element; a first bonding wire electrically connecting the bonding pad to the lower semiconductor element; and electrically connecting the upper semiconductor element and the wiring relay member. A second bonding wire connected thereto, a third bonding wire electrically connected to the wiring relay member and the bonding pad, A sealing resin in which the first bonding wire, the second bonding wire, and the third bonding wire are sealed, wherein the second bonding wire and the third bonding wire are connected via the wiring relay member; And a bonding wire electrically connected to the semiconductor device. 3. The wiring relay member is provided with a relay bonding pad to which one end of the third bonding wire is bonded, and the relay bonding pad is connected to the first bonding wire and the third bonding wire. The semiconductor device according to claim 1, wherein the semiconductor device is arranged so that the wire does not cross three-dimensionally. 4. A wiring board having an external connection terminal provided on one surface and a bonding pad provided on the other surface, a wiring relay member fixed to the other surface of the wiring substrate, and the wiring relay member. A lower semiconductor element smaller than the size of the wiring relay member fixed thereon, an upper semiconductor element smaller than the size of the lower semiconductor element fixed on the lower semiconductor element, the bonding pad and the lower step A first bonding wire electrically connected to the semiconductor element, a second bonding wire electrically connected to the upper semiconductor element and the wiring relay member, the wiring relay member and the bonding pad, A third bonding wire electrically connected to at least the first bonding wire, the second bonding wire, and A sealing resin in which the third bonding wire is sealed, wherein the second bonding wire and the third bonding wire are electrically connected via the wiring relay member. Semiconductor device. 5. A wiring board having an external connection terminal provided on one surface and a bonding pad provided on the other surface, a lower semiconductor element fixed to the other surface of the wiring board, and the lower semiconductor element An upper semiconductor element fixed on the upper semiconductor element smaller than the size of the lower semiconductor element; a wiring relay member fixed on the upper semiconductor element and smaller than the size of the upper semiconductor element; the bonding pad and the lower step A first bonding wire electrically connected to a semiconductor element; a second bonding wire electrically connected to the upper semiconductor element and the wiring relay member; the wiring relay member and the bonding pad; A third bonding wire electrically connected to at least the first bonding wire and the second bonding wire And a sealing resin in which the third bonding wire is sealed, wherein the second bonding wire and the third bonding wire are electrically connected via the wiring relay member. Semiconductor device. 6. The wiring relay member is provided with a relay bonding pad to which one end of the third bonding wire is bonded, and the relay bonding pad is connected to the first bonding wire and the third bonding wire. The semiconductor device according to claim 4, wherein the semiconductor device is arranged so that the wire does not cross three-dimensionally. 7. A fourth bonding wire electrically connects the lower semiconductor element and the wiring relay member, and electrically connects the lower semiconductor element and the upper semiconductor element via the wiring relay member. The semiconductor device according to claim 1, wherein: 8. The wiring relay member includes a wiring layer.
The semiconductor device according to claim 1, wherein the semiconductor device is a silicon pellet, a resin substrate, a ceramic substrate, or a resin film.