JP2001345294A5 - - Google Patents
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- Publication number
- JP2001345294A5 JP2001345294A5 JP2000163045A JP2000163045A JP2001345294A5 JP 2001345294 A5 JP2001345294 A5 JP 2001345294A5 JP 2000163045 A JP2000163045 A JP 2000163045A JP 2000163045 A JP2000163045 A JP 2000163045A JP 2001345294 A5 JP2001345294 A5 JP 2001345294A5
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- processed
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 9
- 239000000758 substrate Substances 0.000 claims 9
- 238000004519 manufacturing process Methods 0.000 claims 5
- 238000000034 method Methods 0.000 claims 5
- 238000005498 polishing Methods 0.000 claims 3
- 238000011109 contamination Methods 0.000 claims 1
- 238000001312 dry etching Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000163045A JP2001345294A (ja) | 2000-05-31 | 2000-05-31 | 半導体装置の製造方法 |
| US09/870,085 US6924236B2 (en) | 2000-05-31 | 2001-05-30 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000163045A JP2001345294A (ja) | 2000-05-31 | 2000-05-31 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001345294A JP2001345294A (ja) | 2001-12-14 |
| JP2001345294A5 true JP2001345294A5 (enExample) | 2005-06-16 |
Family
ID=18666862
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000163045A Pending JP2001345294A (ja) | 2000-05-31 | 2000-05-31 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6924236B2 (enExample) |
| JP (1) | JP2001345294A (enExample) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6555895B1 (en) * | 2000-07-17 | 2003-04-29 | General Semiconductor, Inc. | Devices and methods for addressing optical edge effects in connection with etched trenches |
| JP2002313757A (ja) * | 2001-04-17 | 2002-10-25 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| JP3949941B2 (ja) | 2001-11-26 | 2007-07-25 | 株式会社東芝 | 半導体装置の製造方法および研磨装置 |
| KR20030044205A (ko) * | 2001-11-29 | 2003-06-09 | 동부전자 주식회사 | 반도체 제조 장치 및 방법 |
| JP2005026413A (ja) | 2003-07-01 | 2005-01-27 | Renesas Technology Corp | 半導体ウエハ、半導体素子およびその製造方法 |
| US20060172526A1 (en) * | 2003-10-16 | 2006-08-03 | United Microelectronics Corp. | Method for preventing edge peeling defect |
| TW200527485A (en) * | 2004-01-30 | 2005-08-16 | Semiconductor Leading Edge Tec | Multilayered wiring structure, method of forming buried wiring, semiconductor device, method of manufacturing semiconductor device, semiconductor mounted device, and method of manufacturing semiconductor mounted device |
| JP4284215B2 (ja) * | 2004-03-24 | 2009-06-24 | 株式会社東芝 | 基板処理方法 |
| US7998865B2 (en) * | 2005-05-31 | 2011-08-16 | Texas Instruments Incorporated | Systems and methods for removing wafer edge residue and debris using a residue remover mechanism |
| US20060266383A1 (en) * | 2005-05-31 | 2006-11-30 | Texas Instruments Incorporated | Systems and methods for removing wafer edge residue and debris using a wafer clean solution |
| KR100722128B1 (ko) * | 2005-12-28 | 2007-05-25 | 동부일렉트로닉스 주식회사 | 반도체 소자 제조방법 |
| DE102006030266A1 (de) * | 2006-06-30 | 2008-01-03 | Advanced Micro Devices, Inc., Sunnyvale | Verringern der Kontamination von Halbleitersubstraten während der Metallisierungsbearbeitung durch Bereitstellen einer Schutzschicht am Substratrand |
| JP2008036783A (ja) | 2006-08-08 | 2008-02-21 | Sony Corp | 研磨方法および研磨装置 |
| TW200845302A (en) * | 2007-05-09 | 2008-11-16 | Promos Technologies Inc | A method of two-step backside etching |
| JP2008042220A (ja) * | 2007-09-25 | 2008-02-21 | Ebara Corp | 基板処理方法及び装置 |
| JP5211835B2 (ja) | 2008-04-30 | 2013-06-12 | ソニー株式会社 | ウエハ研磨装置およびウエハ研磨方法 |
| JP5458608B2 (ja) * | 2009-03-10 | 2014-04-02 | 富士電機株式会社 | 半導体装置の製造方法 |
| JP5649417B2 (ja) | 2010-11-26 | 2015-01-07 | 株式会社荏原製作所 | 固定砥粒を有する研磨テープを用いた基板の研磨方法 |
| JP5815967B2 (ja) | 2011-03-31 | 2015-11-17 | 東京エレクトロン株式会社 | 基板洗浄装置及び真空処理システム |
| CN104882405B (zh) * | 2014-02-27 | 2018-09-25 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
| JP6304445B2 (ja) * | 2015-03-16 | 2018-04-04 | 富士電機株式会社 | 半導体装置の製造方法 |
| JP6676365B2 (ja) * | 2015-12-21 | 2020-04-08 | キヤノン株式会社 | 撮像装置の製造方法 |
| CN110718462B (zh) | 2018-07-10 | 2022-01-18 | 联华电子股份有限公司 | 在半导体晶片上制作半导体结构的方法 |
| KR102898430B1 (ko) | 2019-08-26 | 2025-12-09 | 삼성전자 주식회사 | 반도체 소자 제조 방법 |
| FR3113182B1 (fr) * | 2020-07-31 | 2022-08-12 | Commissariat Energie Atomique | Procédé d'assemblage de plaques par collage moléculaire |
| TWI892014B (zh) | 2022-05-25 | 2025-08-01 | 聯華電子股份有限公司 | 半導體結構及其製造方法 |
| TWI869824B (zh) * | 2023-04-19 | 2025-01-11 | 力晶積成電子製造股份有限公司 | 晶圓的處理方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62154614A (ja) | 1985-12-27 | 1987-07-09 | Toshiba Corp | 接合型半導体基板の製造方法 |
| JP2645478B2 (ja) | 1988-10-07 | 1997-08-25 | 富士通株式会社 | 半導体装置の製造方法 |
| JP2857816B2 (ja) | 1992-05-29 | 1999-02-17 | 株式会社サンシン | ウエハー材縁端面研磨装置 |
| US5578516A (en) * | 1995-07-07 | 1996-11-26 | Vanguard International Semiconductor Corporation | High capacitance dynamic random access memory manufacturing process |
| US5795804A (en) * | 1996-03-07 | 1998-08-18 | United Microelectronics Corporation | Method of fabricating a stack/trench capacitor for a dynamic random access memory (DRAM) |
| US6291315B1 (en) * | 1996-07-11 | 2001-09-18 | Denso Corporation | Method for etching trench in manufacturing semiconductor devices |
| JP3311979B2 (ja) | 1997-12-12 | 2002-08-05 | 株式会社東芝 | 半導体集積回路装置 |
| US6265314B1 (en) * | 1998-06-09 | 2001-07-24 | Advanced Micro Devices, Inc. | Wafer edge polish |
| US6267649B1 (en) | 1999-08-23 | 2001-07-31 | Industrial Technology Research Institute | Edge and bevel CMP of copper wafer |
| US6722964B2 (en) | 2000-04-04 | 2004-04-20 | Ebara Corporation | Polishing apparatus and method |
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2000
- 2000-05-31 JP JP2000163045A patent/JP2001345294A/ja active Pending
-
2001
- 2001-05-30 US US09/870,085 patent/US6924236B2/en not_active Expired - Lifetime