CN110718462B - 在半导体晶片上制作半导体结构的方法 - Google Patents
在半导体晶片上制作半导体结构的方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 76
- 238000000034 method Methods 0.000 title claims abstract description 39
- 229910052751 metal Inorganic materials 0.000 claims abstract description 38
- 239000002184 metal Substances 0.000 claims abstract description 38
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 34
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 claims abstract description 26
- 230000004888 barrier function Effects 0.000 claims abstract description 22
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 23
- 229910052710 silicon Inorganic materials 0.000 claims description 23
- 239000010703 silicon Substances 0.000 claims description 23
- 238000003860 storage Methods 0.000 claims description 21
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 235000012239 silicon dioxide Nutrition 0.000 claims description 7
- 239000000377 silicon dioxide Substances 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 229910017052 cobalt Inorganic materials 0.000 claims description 4
- 239000010941 cobalt Substances 0.000 claims description 4
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 2
- 230000007717 exclusion Effects 0.000 claims description 2
- 229910021334 nickel silicide Inorganic materials 0.000 claims description 2
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 2
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- 238000000059 patterning Methods 0.000 claims 1
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
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- 230000002093 peripheral effect Effects 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 239000006117 anti-reflective coating Substances 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
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- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
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- 239000006227 byproduct Substances 0.000 description 1
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- 229910052757 nitrogen Inorganic materials 0.000 description 1
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Abstract
本发明公开一种在半导体晶片上制作半导体结构的方法。首先提供一半导体晶片,具有一第一区域、一第二区域和一晶边区域。在第一区域和第二区域内分别形成一第一半导体结构和一第二半导体结构。接着对半导体晶片进行一晶边等离子体处理制作工艺,仅仅在晶边区域内形成一阻挡层。再进行一硅化金属制作工艺,在第一区域和第二区域内形成一硅化金属层。
Description
技术领域
本发明涉及半导体制造技术领域,更具体来说,涉及一种在半导体晶片上制作存储节点接触结构及/或接触插塞等半导体结构的方法。
背景技术
在半导体制作工艺中,尤其是前段制作工艺,常需要进行所谓的硅化金属(silicidation)制作工艺,通过在硅表面上形成硅化金属层,来降低接触电阻。
然而,过去的制作方法会同时在硅晶片的晶边区域形成硅化金属层,而形成在晶边区域的硅化金属层或后续蚀刻制作工艺中产生的副产物很可能会剥落在蚀刻机台(例如,用来蚀刻钨金属的蚀刻机台)的反应室内,导致蚀刻机台的污染问题,影响到制作工艺的可靠性或良率。
因此,该技术领域仍需要一种改良的方法,以解决上述现有技术的不足与缺点。
发明内容
本发明的主要目的在于提供一种改良的在半导体晶片上制作半导体结构的方法,可以避免在硅化金属制作工艺过程中于硅晶片的晶边区域形成硅化金属层,用于解决蚀刻机台的污染问题,并提升制作工艺的可靠性或良率。
根据本发明一实施例,本发明提供一种在半导体基底上制作半导体结构的方法。首先提供一半导体晶片,具有一第一区域、一第二区域和一晶边区域。在第一区域和第二区域内分别形成一第一半导体结构和一第二半导体结构。接着对半导体晶片进行一晶边等离子体处理制作工艺,仅仅在晶边区域内形成一阻挡层。再进行一硅化金属制作工艺,在第一区域和第二区域内形成一硅化金属层。例如,阻挡层可以是二氧化硅层。
其中,所述第一区域可以是一存储器区域,所述第二区域可以是一周边电路区域。第一半导体结构包含一存储单元的一存储节点接触结构,第二半导体结构包含一晶体管的一源极或漏极接触结构。
本发明通过在进行硅化金属制作工艺之前,先以晶边等离子体处理制作工艺仅仅在半导体晶片的晶边区域BR内形成阻挡层,如此,在硅化金属制作工艺过程中,避免在晶边区域BR内形成硅化金属层,因此,可以解决蚀刻机台的污染问题,并提升制作工艺的可靠性或良率。
为让本发明的上述目的、特征及优点能更明显易懂,下文特举优选实施方式,并配合所附的附图,作详细说明如下。然而如下的优选实施方式与附图仅供参考与说明用,并非用来对本发明加以限制者。
附图说明
图1为一半导体晶片的上视图;
图2为图1中半导体晶片的剖面示意图;
图3至图9为本发明一实施例所绘示的在半导体晶片上制作半导体结构的方法的剖面示意图;
图10为对半导体晶片进行晶边等离子体处理制作工艺的示意图。
主要元件符号说明
10 第一半导体结构
11 位线结构
20 第二半导体结构
21 晶体管
100 半导体晶片
101 半导体基底
101a 硅表面
102 元件隔离区域
111 多晶硅层
112 钨金属层
113 上盖层
121 源极或漏极区域
210 栅极结构
211 多晶硅层
212 钨金属层
213 上盖层
214 间隙壁
215 接触蚀刻停止层
300 介电层
310 存储节点接触洞
311 存储节点接触结构
320 源极或漏极接触结构
410 阻挡层
412 金属膜
420 硅化金属层
426 导电层
430 图案转移堆叠层
431 氮化硅层
432 有机介电层
433 含硅硬掩模底抗反射涂布层
440 光致抗蚀剂图案
440a 开口
500 晶边蚀刻机台
510 上部金属件
510a 气体管路
511 上PEZ环
512 上电极
520 晶片座
521 下PEZ环
522 下电极
550 反应室
CR 中央区域
CR-1 第一区域
CR-2 第二区域
BR 晶边区域
SC 存储节点接垫
CP 接触插塞
M0 金属层
具体实施方式
在下文中,将参照附图说明细节,该些附图中的内容也构成说明书细节描述的一部分,并且以可实行该实施例的特例描述方式来绘示。下文实施例已描述足够的细节使该领域的一般技术人士得以具以实施。
当然,也可采行其他的实施例,或是在不悖离文中所述实施例的前提下作出任何结构性、逻辑性、及电性上的改变。因此,下文的细节描述不应被视为是限制,反之,其中所包含的实施例将由随附的权利要求来加以界定。
请参阅图1及图2,其中图1例示一半导体晶片的上视图,图2为图1半导体晶片的剖面示意图。如图1及图2所示,半导体晶片100为一圆盘状结构,具有一中央区域CR以及环绕着中央区域CR的晶边区域(wafer bevel region)BR。以12英寸硅晶片为例,晶边区域BR指的是沿着半导体晶片100边缘宽度约1毫米至3毫米(mm),例如2毫米,的环形带状区域。半导体电路元件,例如,晶体管或存储单元,即形成在中央区域CR内。在晶边区域BR则通常不会形成有晶体管或存储单元等半导体结构。
请参阅图3至图9,其为依据本发明一实施例所绘示的在半导体晶片上制作半导体结构的方法的剖面示意图,其中相同的区域、元件及材料层仍沿用相同的标示符号。如图3所示,首先提供一半导体晶片100,包含一半导体基底101,例如硅基底,其上具有一第一区域CR-1、一第二区域CR-2和一晶边区域BR。其中第一区域CR-1和一第二区域CR-2均位于图1及中图2的中央区域CR内,例如,第一区域CR-1可以是一存储器区域,第二区域CR-2可以是一周边电路区域。
根据本发明实施例,存储器区域内可以形成多个存储单元或者存储单元阵列,而周边电路区域内可以形成周边电路的晶体管结构。为简化说明,图中仅显示单个存储单元和单个晶体管结构。
如图3所示,在第一区域CR-1和第二区域CR-2内的半导体基底101上已分别形成有第一半导体结构10和第二半导体结构20。根据本发明实施例,第一半导体结构10包含一存储单元的一存储节点接触结构311。根据本发明实施例,第一半导体结构10包含一位线结构11,设于一介电层300中,并且可以深入至半导体基底101内。
在位线结构11旁边的介电层300中,形成有一存储节点接触洞310,而存储节点接触结构311位于存储节点接触洞310底部,并且与部分的半导体基底101接触。存储节点接触结构311并未填满存储节点接触洞310。在半导体基底101内,另设有元件隔离区域102,例如,浅沟绝缘区域,用以隔离元件。根据本发明实施例,存储节点接触结构311包含一非晶硅(amorphous Si)或多晶硅。根据本发明实施例,位线结构11可以包含一多晶硅层111、一钨金属层112以及一上盖层113,但不限于此。
根据本发明实施例,第二半导体结构20包含一晶体管21的一源极或漏极接触结构320,或者接触洞,其显露出部分的半导体基底101内的源极或漏极区域121。根据本发明实施例,晶体管21包含一栅极结构210,例如,由一多晶硅层211、一钨金属层212以及一上盖层213堆叠而成。在栅极结构210的侧壁上可以形成有一间隙壁214,而在晶体管21上可以覆盖有一接触蚀刻停止层215。介电层300形成在接触蚀刻停止层215上。
由于位线结构11、存储节点接触结构311、栅极结构210、源极或漏极区域121、接触蚀刻停止层215、介电层320及源极或漏极接触结构320等的做法为已知技术,故其细节不另赘述。根据本发明实施例,在第一区域CR-1和第二区域CR-2内的半导体基底101上分别形成上述第一半导体结构10和第二半导体结构20之后,此时,晶边区域BR内的半导体基底101的硅表面101a是被显露出来的。
如图4所示,接着对半导体晶片100进行一晶边等离子体处理制作工艺,仅仅在晶边区域BR内形成一阻挡层410。根据本发明实施例,阻挡层410为二氧化硅层。所述二氧化硅层在晶边等离子体处理制作工艺时氧化晶边区域BR的硅表面101a所形成的,其厚度约为10埃至20埃,但不限于此。阻挡层410的厚度需足够抵挡后续沉积的金属层(例如,钴或镍)与其下方的硅表面101a反应。
请参阅图10,其例示对半导体晶片进行晶边等离子体处理制作工艺的示意图。根据本发明实施例,在进行所述晶边等离子体处理制作工艺时,半导体晶片100被置于设置有等离子体禁区(plasma exclusion zone,PEZ)环的晶边蚀刻机台500中。如图10所示,晶边蚀刻机台500包含一上PEZ环511和一下PEZ环521,靠近半导体晶片100的晶边区域BR。半导体晶片100被置于一晶片座520上,例如,晶片座520可以是一真空吸附底座(vacuum chuck)或静电吸附底座(E-chuck)。
根据本发明实施例,上PEZ环511可以设置在一上部金属件510的周围,使得上部金属件510与上PEZ环511的下表面齐平,并与半导体晶片100维持一预定距离。上部金属件510可以是铝金属所构成,且其表面可以经过阳极处理。在上部金属件510内部可以有一气体管路510a,用来供应一预定气体,以控制等离子体气体的扩散。上PEZ环511的外侧还可以设置有一上电极512,而下PEZ环521的外侧可以设置有一下电极522,以提供一预定功率的电场,足以在反应室550内产生等离子体,并扩散至晶边区域BR内。
根据本发明实施例,所述晶边等离子体处理制作工艺可以利用氧气等离子体,通过气体管路510a供应的气体,控制等离子体气体的扩散,并通过上PEZ环511与下PEZ环521的调整,使得氧气等离子体仅会与半导体晶片100的晶边区域BR反应成为二氧化硅阻挡层。然而,本发明并不限于阻挡层410是二氧化硅层的例子,在其它实施例中,可以通过调整等离子体气体成分(例如,氮气、氧气、一氧化碳、二氧化碳等),而得到不同组成的阻挡层410,例如,阻挡层410可以包含氮氧化硅、碳氧化硅、氮化硅或碳化硅。
如图5及图6所示,随后进行一硅化金属制作工艺。
首先,如图5所示,在第一区域CR-1和第二区域CR-2内以及晶边区域BR内的阻挡层410上全面形成一金属膜412,例如,钴或镍层。金属膜412可以利用沉积法,例如原子层沉积(ALD)法,共形的沉积在第一区域CR-1的存储节点接触洞310的表面、存储节点接触结构311表面和位线结构11上,且金属膜412共形的沉积在第二区域CR-2内的源极或漏极接触结构320表面及介电层300上。
然后,如图6所示,进行一热制作工艺,例如快速热制作工艺(RTP),使得金属膜412分别与存储节点接触洞310的表面和源极或漏极接触结构320内的硅表面反应形成硅化金属层420,由于阻挡层410覆盖住晶边区域BR的硅表面101a的缘故,所以金属膜412不会与晶边区域BR的硅表面101a反应形成硅化金属层。
接着,利用蚀刻方式,例如,利用硫酸溶液,从第一区域CR-1、第二区域CR-2去除掉未反应的金属膜412,并从晶边区域BR内的阻挡层410上去除掉未反应的金属膜412,如此仅于第一区域CR-1和第二区域CR-2内形成硅化金属层420。根据本发明实施例,硅化金属层420可以包含硅化钴或硅化镍。
接着,如图7至图9所示,在完成前述硅化金属制作工艺,在第一区域CR-1和第二区域CR-2内形成硅化金属层420之后,接着进行的是第一区域CR-1内的存储节点接垫的制作和第二区域CR-2内的接触插塞的制作。
如图7所示,仅在第一区域CR-1和第二区域CR-2内选择性的沉积一导电层426,例如,钨金属层。导电层426填满第一区域CR-1内的存储节点接触洞310,并与硅化金属层420直接接触,且导电层426填满第二区域CR-2内的源极或漏极接触结构320。在晶边区域BR内则不会形成导电层426,故此时晶边区域BR内的阻挡层410是被显露出来的。
如图8所示,接着在第一区域CR-1、第二区域CR-2内以及晶边区域BR内全面沉积一图案转移堆叠层430,例如,包括一氮化硅层431、一有机介电层(ODL)432和一含硅硬掩模底抗反射涂布(SHB)层433,但不限于此。然后,在图案转移堆叠层430上形成一光致抗蚀剂图案440,包含开口440a,显露出部分的图案转移堆叠层430的表面。
如图9所示,接着进行一各向异性干蚀刻制作工艺,图案化导电层426,在第一区域CR-1内形成存储节点接垫SC,在第二区域CR-2内形成接触插塞CP及M0金属层,而在晶边区域BR内显露出硅表面101a。在前述图案转移的过程中,原本形成在晶边区域BR内的氮化硅层431和含硅硬掩模底抗反射涂布(SHB)层433会被去除,故显露出硅表面101a。
本发明通过在进行硅化金属制作工艺之前,先以晶边等离子体处理制作工艺仅仅在半导体晶片100的晶边区域BR内形成阻挡层410,如此,在硅化金属制作工艺过程中,避免在晶边区域BR内形成硅化金属层,因此,可以解决蚀刻机台的污染问题,并提升制作工艺的可靠性或良率。
以上所述仅为本发明的优选实施例,凡依本发明权利要求所做的均等变化与修饰,都应属本发明的涵盖范围。
Claims (9)
1.一种在半导体晶片上制作半导体结构的方法,其特征在于,包含:
提供一半导体晶片,具有第一区域、第二区域和晶边区域;
在该第一区域和该第二区域内分别形成第一半导体结构和第二半导体结构;
对该半导体晶片进行一晶边等离子体处理制作工艺,仅仅在该晶边区域内形成阻挡层;以及
进行一硅化金属制作工艺,在该第一区域和该第二区域内形成硅化金属层,
其中,在完成该硅化金属制作工艺,在该第一区域和该第二区域内形成该硅化金属层之后,该方法另包含:
仅在该第一区域和该第二区域内沉积一导电层;以及
图案化该导电层,在该第一区域内形成一存储节点接垫,在该第二区域内形成一接触插塞及一M0金属层,而在该晶边区域内显露出硅表面。
2.如权利要求1所述的方法,其中该第一区域为存储器区域,该第二区域为一周边电路区域。
3.如权利要求2所述的方法,其中该第一半导体结构包含存储单元的存储节点接触结构,该第二半导体结构包含晶体管的源极或漏极接触结构。
4.如权利要求2所述的方法,其中该阻挡层为二氧化硅层。
5.如权利要求4所述的方法,其中该二氧化硅层在该晶边等离子体处理制作工艺时氧化该晶边区域的硅表面所形成的。
6.如权利要求1所述的方法,其中在该晶边等离子体处理制作工艺时,该半导体晶片被置于设置有等离子体禁区(plasma exclusion zone,PEZ)环的晶边蚀刻机台中。
7.如权利要求1所述的方法,其中该阻挡层包含氮氧化硅、碳氧化硅、氮化硅或碳化硅。
8.如权利要求1所述的方法,其中该硅化金属制作工艺包含:
在该第一区域和该第二区域内以及该晶边区域内的该阻挡层上全面形成一金属膜;
进行一热制作工艺,仅于该第一区域和该第二区域内形成该硅化金属层;以及
从该第一区域、该第二区域及该晶边区域内的该阻挡层上去除掉未反应的该金属膜。
9.如权利要求1所述的方法,其中该硅化金属层包含硅化钴或硅化镍。
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