JP2005340800A5 - - Google Patents

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Publication number
JP2005340800A5
JP2005340800A5 JP2005130163A JP2005130163A JP2005340800A5 JP 2005340800 A5 JP2005340800 A5 JP 2005340800A5 JP 2005130163 A JP2005130163 A JP 2005130163A JP 2005130163 A JP2005130163 A JP 2005130163A JP 2005340800 A5 JP2005340800 A5 JP 2005340800A5
Authority
JP
Japan
Prior art keywords
conductive layer
mask pattern
etching
wiring
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2005130163A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005340800A (ja
JP4860175B2 (ja
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Publication date
Application filed filed Critical
Priority to JP2005130163A priority Critical patent/JP4860175B2/ja
Priority claimed from JP2005130163A external-priority patent/JP4860175B2/ja
Publication of JP2005340800A publication Critical patent/JP2005340800A/ja
Publication of JP2005340800A5 publication Critical patent/JP2005340800A5/ja
Application granted granted Critical
Publication of JP4860175B2 publication Critical patent/JP4860175B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2005130163A 2004-04-28 2005-04-27 配線の作製方法、半導体装置の作製方法 Expired - Fee Related JP4860175B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005130163A JP4860175B2 (ja) 2004-04-28 2005-04-27 配線の作製方法、半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004134535 2004-04-28
JP2004134535 2004-04-28
JP2005130163A JP4860175B2 (ja) 2004-04-28 2005-04-27 配線の作製方法、半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2005340800A JP2005340800A (ja) 2005-12-08
JP2005340800A5 true JP2005340800A5 (enExample) 2008-04-17
JP4860175B2 JP4860175B2 (ja) 2012-01-25

Family

ID=35493953

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005130163A Expired - Fee Related JP4860175B2 (ja) 2004-04-28 2005-04-27 配線の作製方法、半導体装置の作製方法

Country Status (1)

Country Link
JP (1) JP4860175B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5656036B2 (ja) * 2013-03-28 2015-01-21 Toto株式会社 複合構造物
JP6326312B2 (ja) * 2014-07-14 2018-05-16 株式会社ジャパンディスプレイ 表示装置
US20180096853A1 (en) * 2015-04-16 2018-04-05 Japan Advanced Institute Of Science And Technology Method of producing etching mask, etching mask precursor, and oxide layer, and method of manufacturing thin film transistor
JP6744395B2 (ja) * 2016-03-14 2020-08-19 国立大学法人北陸先端科学技術大学院大学 積層体、エッチングマスク、積層体の製造方法、及びエッチングマスクの製造方法、並びに薄膜トランジスタの製造方法
JP6885024B2 (ja) * 2016-11-17 2021-06-09 大日本印刷株式会社 透明電極

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2585267B2 (ja) * 1987-05-08 1997-02-26 株式会社東芝 液晶表示装置
JPH0661195A (ja) * 1992-08-06 1994-03-04 Toshiba Corp 半導体装置の製造方法
JP3164756B2 (ja) * 1995-08-30 2001-05-08 京セラ株式会社 多層薄膜回路の形成方法
JP4301628B2 (ja) * 1999-04-23 2009-07-22 三菱電機株式会社 ドライエッチング方法

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