JP2000183329A5 - - Google Patents

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Publication number
JP2000183329A5
JP2000183329A5 JP1999219318A JP21931899A JP2000183329A5 JP 2000183329 A5 JP2000183329 A5 JP 2000183329A5 JP 1999219318 A JP1999219318 A JP 1999219318A JP 21931899 A JP21931899 A JP 21931899A JP 2000183329 A5 JP2000183329 A5 JP 2000183329A5
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JP
Japan
Prior art keywords
impurities
conductive layer
semiconductor device
introducing
refractory metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1999219318A
Other languages
English (en)
Japanese (ja)
Other versions
JP4581159B2 (ja
JP2000183329A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP21931899A priority Critical patent/JP4581159B2/ja
Priority claimed from JP21931899A external-priority patent/JP4581159B2/ja
Priority to US09/413,193 priority patent/US6417565B1/en
Priority to KR1019990043162A priority patent/KR100730602B1/ko
Publication of JP2000183329A publication Critical patent/JP2000183329A/ja
Priority to US10/150,974 priority patent/US20030011035A1/en
Publication of JP2000183329A5 publication Critical patent/JP2000183329A5/ja
Application granted granted Critical
Publication of JP4581159B2 publication Critical patent/JP4581159B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP21931899A 1998-10-08 1999-08-02 半導体装置およびその製造方法 Expired - Fee Related JP4581159B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP21931899A JP4581159B2 (ja) 1998-10-08 1999-08-02 半導体装置およびその製造方法
US09/413,193 US6417565B1 (en) 1998-10-08 1999-10-05 Semiconductor device and method for producing same
KR1019990043162A KR100730602B1 (ko) 1998-10-08 1999-10-07 반도체 장치 및 그 제조 방법
US10/150,974 US20030011035A1 (en) 1998-10-08 2002-05-21 Semiconductor device and method for producing same

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP10-287077 1998-10-08
JP28707798 1998-10-08
JP21931899A JP4581159B2 (ja) 1998-10-08 1999-08-02 半導体装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2000183329A JP2000183329A (ja) 2000-06-30
JP2000183329A5 true JP2000183329A5 (enExample) 2006-04-27
JP4581159B2 JP4581159B2 (ja) 2010-11-17

Family

ID=26523049

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21931899A Expired - Fee Related JP4581159B2 (ja) 1998-10-08 1999-08-02 半導体装置およびその製造方法

Country Status (3)

Country Link
US (2) US6417565B1 (enExample)
JP (1) JP4581159B2 (enExample)
KR (1) KR100730602B1 (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6143617A (en) * 1998-02-23 2000-11-07 Taiwan Semiconductor Manufacturing Company Composite capacitor electrode for a DRAM cell
JP2001244469A (ja) * 2000-03-02 2001-09-07 Oki Electric Ind Co Ltd 半導体装置およびその製造方法
KR100331861B1 (en) * 2000-07-21 2002-04-09 Hynix Semiconductor Inc Method for fabricating gate electrode of semiconductor device
KR100447031B1 (ko) * 2001-03-23 2004-09-07 삼성전자주식회사 텅스텐 실리사이드막의 형성방법
JP3768871B2 (ja) * 2001-12-18 2006-04-19 株式会社東芝 半導体装置の製造方法
US6762469B2 (en) 2002-04-19 2004-07-13 International Business Machines Corporation High performance CMOS device structure with mid-gap metal gate
US20040176751A1 (en) * 2002-08-14 2004-09-09 Endovia Medical, Inc. Robotic medical instrument system
JP2004134705A (ja) * 2002-10-15 2004-04-30 Jiaotong Univ 金属酸化膜半導体電界効果トランジスタおよびそのゲート構造
US7323411B1 (en) * 2003-09-26 2008-01-29 Cypress Semiconductor Corporation Method of selective tungsten deposition on a silicon surface
US20050121733A1 (en) * 2003-12-09 2005-06-09 Taiwan Semiconductor Manufacturing Co. Method of forming a semiconductor device with a high dielectric constant material and an offset spacer
KR100550345B1 (ko) * 2004-10-11 2006-02-08 삼성전자주식회사 반도체 장치의 실리사이드막 형성방법
JP4455427B2 (ja) * 2005-06-29 2010-04-21 株式会社東芝 半導体装置及びその製造方法
JP4320405B2 (ja) * 2007-03-27 2009-08-26 Okiセミコンダクタ株式会社 半導体装置及びその製造方法
KR101877377B1 (ko) 2010-04-23 2018-07-11 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법
WO2011132591A1 (en) * 2010-04-23 2011-10-27 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
KR101540039B1 (ko) 2010-04-23 2015-07-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법
DE112011101395B4 (de) 2010-04-23 2014-10-16 Semiconductor Energy Laboratory Co., Ltd. Verfahren zum Herstellen einer Halbleitervorrichtung
US12015066B2 (en) 2020-06-17 2024-06-18 Taiwan Semiconductor Manufacturing Co., Ltd. Triple layer high-k gate dielectric stack for workfunction engineering

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108358A (ja) * 1982-12-13 1984-06-22 Fujitsu Ltd 半導体装置
JPS6465872A (en) * 1987-09-05 1989-03-13 Fujitsu Ltd Manufacture of semiconductor device
JPH0198230A (ja) * 1987-10-09 1989-04-17 Fujitsu Ltd 半導体装置の製造方法
JPH0196958A (ja) * 1987-10-09 1989-04-14 Fujitsu Ltd 半導体装置の製造方法
AU638812B2 (en) * 1990-04-16 1993-07-08 Digital Equipment Corporation A method of operating a semiconductor device
JP3285934B2 (ja) * 1991-07-16 2002-05-27 株式会社東芝 半導体装置の製造方法
JPH07263680A (ja) * 1994-03-24 1995-10-13 Hitachi Ltd 半導体装置の製造方法
US5952701A (en) * 1997-08-18 1999-09-14 National Semiconductor Corporation Design and fabrication of semiconductor structure having complementary channel-junction insulated-gate field-effect transistors whose gate electrodes have work functions close to mid-gap semiconductor value

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