JP2000164718A5 - - Google Patents
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- Publication number
- JP2000164718A5 JP2000164718A5 JP1999327664A JP32766499A JP2000164718A5 JP 2000164718 A5 JP2000164718 A5 JP 2000164718A5 JP 1999327664 A JP1999327664 A JP 1999327664A JP 32766499 A JP32766499 A JP 32766499A JP 2000164718 A5 JP2000164718 A5 JP 2000164718A5
- Authority
- JP
- Japan
- Prior art keywords
- seed film
- forming
- tank
- substrate
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US198922 | 1994-02-18 | ||
| US19892298A | 1998-11-24 | 1998-11-24 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000164718A JP2000164718A (ja) | 2000-06-16 |
| JP2000164718A5 true JP2000164718A5 (enExample) | 2007-01-11 |
| JP4444420B2 JP4444420B2 (ja) | 2010-03-31 |
Family
ID=22735460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32766499A Expired - Fee Related JP4444420B2 (ja) | 1998-11-24 | 1999-11-18 | 導電性構造および半導体装置を形成するためのプロセス |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1005078B1 (enExample) |
| JP (1) | JP4444420B2 (enExample) |
| KR (1) | KR100647996B1 (enExample) |
| CN (1) | CN1255746A (enExample) |
| DE (1) | DE69914294T2 (enExample) |
| TW (1) | TW436990B (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6423200B1 (en) * | 1999-09-30 | 2002-07-23 | Lam Research Corporation | Copper interconnect seed layer treatment methods and apparatuses for treating the same |
| EP1111096A3 (en) | 1999-12-15 | 2004-02-11 | Shipley Company LLC | Seed layer repair method |
| KR100400765B1 (ko) * | 2000-11-13 | 2003-10-08 | 엘지.필립스 엘시디 주식회사 | 박막 형성방법 및 이를 적용한 액정표시소자의 제조방법 |
| US6849173B1 (en) * | 2002-06-12 | 2005-02-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Technique to enhance the yield of copper interconnections |
| KR20040001470A (ko) * | 2002-06-28 | 2004-01-07 | 주식회사 하이닉스반도체 | 반도체 소자의 배선 형성을 위한 구리 씨앗층 형성 방법 |
| KR100808601B1 (ko) * | 2006-12-28 | 2008-02-29 | 주식회사 하이닉스반도체 | 다마신 공정을 이용한 반도체 소자의 다층 금속배선형성방법 |
| CN104299958B (zh) * | 2013-07-16 | 2018-11-16 | 中芯国际集成电路制造(上海)有限公司 | 互连结构及互连结构的形成方法 |
| CN111031683B (zh) * | 2019-12-23 | 2021-10-08 | 沪士电子股份有限公司 | 一种pcb生产工艺中图形电镀陪镀板的设计和使用方法 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0783168B2 (ja) * | 1988-04-13 | 1995-09-06 | 株式会社日立製作所 | プリント板の製造方法 |
| US5391517A (en) * | 1993-09-13 | 1995-02-21 | Motorola Inc. | Process for forming copper interconnect structure |
| KR20000057470A (ko) * | 1996-12-16 | 2000-09-15 | 포만 제프리 엘 | 집적 회로 칩 상의 전기 도금된 상호 접속 구조체 |
-
1999
- 1999-11-01 TW TW088118965A patent/TW436990B/zh not_active IP Right Cessation
- 1999-11-10 DE DE1999614294 patent/DE69914294T2/de not_active Expired - Fee Related
- 1999-11-10 EP EP99122376A patent/EP1005078B1/en not_active Expired - Lifetime
- 1999-11-18 JP JP32766499A patent/JP4444420B2/ja not_active Expired - Fee Related
- 1999-11-23 CN CN99124491A patent/CN1255746A/zh active Pending
- 1999-11-23 KR KR1019990052119A patent/KR100647996B1/ko not_active Expired - Fee Related
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