KR100647996B1 - 전도성 구조체 및 반도체 디바이스의 제조 방법 - Google Patents

전도성 구조체 및 반도체 디바이스의 제조 방법 Download PDF

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Publication number
KR100647996B1
KR100647996B1 KR1019990052119A KR19990052119A KR100647996B1 KR 100647996 B1 KR100647996 B1 KR 100647996B1 KR 1019990052119 A KR1019990052119 A KR 1019990052119A KR 19990052119 A KR19990052119 A KR 19990052119A KR 100647996 B1 KR100647996 B1 KR 100647996B1
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KR
South Korea
Prior art keywords
seed film
substrate
bath
film
forming
Prior art date
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Expired - Fee Related
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KR1019990052119A
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English (en)
Korean (ko)
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KR20000035623A (ko
Inventor
미콜라로버트디.
차우더리리나
Original Assignee
프리스케일 세미컨덕터, 인크.
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Publication of KR20000035623A publication Critical patent/KR20000035623A/ko
Application granted granted Critical
Publication of KR100647996B1 publication Critical patent/KR100647996B1/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28568—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
KR1019990052119A 1998-11-24 1999-11-23 전도성 구조체 및 반도체 디바이스의 제조 방법 Expired - Fee Related KR100647996B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US19892298A 1998-11-24 1998-11-24
US09/198,922 1998-11-24
US9/198,922 1998-11-24

Publications (2)

Publication Number Publication Date
KR20000035623A KR20000035623A (ko) 2000-06-26
KR100647996B1 true KR100647996B1 (ko) 2006-11-23

Family

ID=22735460

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990052119A Expired - Fee Related KR100647996B1 (ko) 1998-11-24 1999-11-23 전도성 구조체 및 반도체 디바이스의 제조 방법

Country Status (6)

Country Link
EP (1) EP1005078B1 (enExample)
JP (1) JP4444420B2 (enExample)
KR (1) KR100647996B1 (enExample)
CN (1) CN1255746A (enExample)
DE (1) DE69914294T2 (enExample)
TW (1) TW436990B (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6423200B1 (en) * 1999-09-30 2002-07-23 Lam Research Corporation Copper interconnect seed layer treatment methods and apparatuses for treating the same
EP1111096A3 (en) 1999-12-15 2004-02-11 Shipley Company LLC Seed layer repair method
KR100400765B1 (ko) * 2000-11-13 2003-10-08 엘지.필립스 엘시디 주식회사 박막 형성방법 및 이를 적용한 액정표시소자의 제조방법
US6849173B1 (en) * 2002-06-12 2005-02-01 Taiwan Semiconductor Manufacturing Company, Ltd. Technique to enhance the yield of copper interconnections
KR20040001470A (ko) * 2002-06-28 2004-01-07 주식회사 하이닉스반도체 반도체 소자의 배선 형성을 위한 구리 씨앗층 형성 방법
KR100808601B1 (ko) * 2006-12-28 2008-02-29 주식회사 하이닉스반도체 다마신 공정을 이용한 반도체 소자의 다층 금속배선형성방법
CN104299958B (zh) * 2013-07-16 2018-11-16 中芯国际集成电路制造(上海)有限公司 互连结构及互连结构的形成方法
CN111031683B (zh) * 2019-12-23 2021-10-08 沪士电子股份有限公司 一种pcb生产工艺中图形电镀陪镀板的设计和使用方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028513A (en) * 1988-04-13 1991-07-02 Hitachi, Ltd. Process for producing printed circuit board
US5391517A (en) * 1993-09-13 1995-02-21 Motorola Inc. Process for forming copper interconnect structure
WO1998027585A1 (en) * 1996-12-16 1998-06-25 International Business Machines Corporation Electroplated interconnection structures on integrated circuit chips

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028513A (en) * 1988-04-13 1991-07-02 Hitachi, Ltd. Process for producing printed circuit board
US5391517A (en) * 1993-09-13 1995-02-21 Motorola Inc. Process for forming copper interconnect structure
WO1998027585A1 (en) * 1996-12-16 1998-06-25 International Business Machines Corporation Electroplated interconnection structures on integrated circuit chips

Also Published As

Publication number Publication date
EP1005078B1 (en) 2004-01-21
KR20000035623A (ko) 2000-06-26
JP2000164718A (ja) 2000-06-16
JP4444420B2 (ja) 2010-03-31
TW436990B (en) 2001-05-28
DE69914294T2 (de) 2004-11-18
CN1255746A (zh) 2000-06-07
DE69914294D1 (de) 2004-02-26
EP1005078A1 (en) 2000-05-31

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