DE69914294D1 - Verfahren zur Herstellung einer leitenden Struktur - Google Patents
Verfahren zur Herstellung einer leitenden StrukturInfo
- Publication number
- DE69914294D1 DE69914294D1 DE69914294T DE69914294T DE69914294D1 DE 69914294 D1 DE69914294 D1 DE 69914294D1 DE 69914294 T DE69914294 T DE 69914294T DE 69914294 T DE69914294 T DE 69914294T DE 69914294 D1 DE69914294 D1 DE 69914294D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- conductive structure
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28568—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electroplating Methods And Accessories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US198922 | 1994-02-18 | ||
US19892298A | 1998-11-24 | 1998-11-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69914294D1 true DE69914294D1 (de) | 2004-02-26 |
DE69914294T2 DE69914294T2 (de) | 2004-11-18 |
Family
ID=22735460
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE1999614294 Expired - Fee Related DE69914294T2 (de) | 1998-11-24 | 1999-11-10 | Verfahren zur Herstellung einer leitenden Struktur |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP1005078B1 (de) |
JP (1) | JP4444420B2 (de) |
KR (1) | KR100647996B1 (de) |
CN (1) | CN1255746A (de) |
DE (1) | DE69914294T2 (de) |
TW (1) | TW436990B (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6423200B1 (en) * | 1999-09-30 | 2002-07-23 | Lam Research Corporation | Copper interconnect seed layer treatment methods and apparatuses for treating the same |
KR100760337B1 (ko) * | 1999-12-15 | 2007-09-20 | 롬 앤드 하스 일렉트로닉 머트어리얼즈, 엘.엘.씨 | 시드층 보수방법 |
KR100400765B1 (ko) | 2000-11-13 | 2003-10-08 | 엘지.필립스 엘시디 주식회사 | 박막 형성방법 및 이를 적용한 액정표시소자의 제조방법 |
US6849173B1 (en) * | 2002-06-12 | 2005-02-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Technique to enhance the yield of copper interconnections |
KR20040001470A (ko) * | 2002-06-28 | 2004-01-07 | 주식회사 하이닉스반도체 | 반도체 소자의 배선 형성을 위한 구리 씨앗층 형성 방법 |
KR100808601B1 (ko) * | 2006-12-28 | 2008-02-29 | 주식회사 하이닉스반도체 | 다마신 공정을 이용한 반도체 소자의 다층 금속배선형성방법 |
CN104299958B (zh) * | 2013-07-16 | 2018-11-16 | 中芯国际集成电路制造(上海)有限公司 | 互连结构及互连结构的形成方法 |
CN111031683B (zh) * | 2019-12-23 | 2021-10-08 | 沪士电子股份有限公司 | 一种pcb生产工艺中图形电镀陪镀板的设计和使用方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0783168B2 (ja) * | 1988-04-13 | 1995-09-06 | 株式会社日立製作所 | プリント板の製造方法 |
US5391517A (en) * | 1993-09-13 | 1995-02-21 | Motorola Inc. | Process for forming copper interconnect structure |
EP0932913A1 (de) * | 1996-12-16 | 1999-08-04 | International Business Machines Corporation | Elektroplattierte verbindungsstrukturen in integrierten schaltungen |
-
1999
- 1999-11-01 TW TW088118965A patent/TW436990B/zh not_active IP Right Cessation
- 1999-11-10 DE DE1999614294 patent/DE69914294T2/de not_active Expired - Fee Related
- 1999-11-10 EP EP99122376A patent/EP1005078B1/de not_active Expired - Lifetime
- 1999-11-18 JP JP32766499A patent/JP4444420B2/ja not_active Expired - Fee Related
- 1999-11-23 CN CN99124491A patent/CN1255746A/zh active Pending
- 1999-11-23 KR KR1019990052119A patent/KR100647996B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP1005078B1 (de) | 2004-01-21 |
KR20000035623A (ko) | 2000-06-26 |
TW436990B (en) | 2001-05-28 |
CN1255746A (zh) | 2000-06-07 |
EP1005078A1 (de) | 2000-05-31 |
KR100647996B1 (ko) | 2006-11-23 |
DE69914294T2 (de) | 2004-11-18 |
JP2000164718A (ja) | 2000-06-16 |
JP4444420B2 (ja) | 2010-03-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US |
|
8339 | Ceased/non-payment of the annual fee |