IT9048323A0 - Condensatore impilato di una cella dram e procedimento per questo. - Google Patents

Condensatore impilato di una cella dram e procedimento per questo.

Info

Publication number
IT9048323A0
IT9048323A0 IT9048323A IT4832390A IT9048323A0 IT 9048323 A0 IT9048323 A0 IT 9048323A0 IT 9048323 A IT9048323 A IT 9048323A IT 4832390 A IT4832390 A IT 4832390A IT 9048323 A0 IT9048323 A0 IT 9048323A0
Authority
IT
Italy
Prior art keywords
procedure
dram cell
stacked capacitor
capacitor
stacked
Prior art date
Application number
IT9048323A
Other languages
English (en)
Other versions
IT9048323A1 (it
IT1242357B (it
Inventor
Won-Shik Baek
Dong-Joo Bae
Kyu-Hyun Choi
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of IT9048323A0 publication Critical patent/IT9048323A0/it
Publication of IT9048323A1 publication Critical patent/IT9048323A1/it
Application granted granted Critical
Publication of IT1242357B publication Critical patent/IT1242357B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
IT48323A 1990-06-29 1990-09-28 Condensatore impilato di una cella dram e procedimento per questo. IT1242357B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900009726A KR930007192B1 (ko) 1990-06-29 1990-06-29 디램셀의 적층형캐패시터 및 제조방법

Publications (3)

Publication Number Publication Date
IT9048323A0 true IT9048323A0 (it) 1990-09-28
IT9048323A1 IT9048323A1 (it) 1992-03-28
IT1242357B IT1242357B (it) 1994-03-04

Family

ID=19300626

Family Applications (1)

Application Number Title Priority Date Filing Date
IT48323A IT1242357B (it) 1990-06-29 1990-09-28 Condensatore impilato di una cella dram e procedimento per questo.

Country Status (7)

Country Link
US (1) US5187548A (it)
JP (1) JP2538119B2 (it)
KR (1) KR930007192B1 (it)
DE (1) DE4029256C2 (it)
FR (1) FR2664098B1 (it)
GB (1) GB2245761B (it)
IT (1) IT1242357B (it)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04147669A (ja) * 1990-10-09 1992-05-21 Nec Ic Microcomput Syst Ltd 半導体記憶装置
US5223083A (en) * 1992-01-23 1993-06-29 Micron Technology, Inc. Process for etching a semiconductor device using an improved protective etching mask
US5525534A (en) * 1992-03-13 1996-06-11 Fujitsu Limited Method of producing a semiconductor device using a reticle having a polygonal shaped hole
KR960016486B1 (ko) * 1993-08-31 1996-12-12 현대전자산업 주식회사 디램 캐패시터 및 그 제조방법
JPH07161832A (ja) * 1993-12-08 1995-06-23 Oki Electric Ind Co Ltd 半導体記憶装置およびその製造方法
US5436186A (en) * 1994-04-22 1995-07-25 United Microelectronics Corporation Process for fabricating a stacked capacitor
US5460999A (en) * 1994-06-06 1995-10-24 United Microelectronics Corporation Method for making fin-shaped stack capacitors on DRAM chips
US5981992A (en) * 1995-06-07 1999-11-09 International Business Machines Corporation Mechanical supports for very thin stacked capacitor plates
US5946566A (en) * 1996-03-01 1999-08-31 Ace Memory, Inc. Method of making a smaller geometry high capacity stacked DRAM device
US5926718A (en) * 1996-08-20 1999-07-20 Micron Technology, Inc. Method for forming a capacitor
DE19640271C1 (de) * 1996-09-30 1998-03-05 Siemens Ag Verfahren zur Herstellung einer integrierten Halbleiterspeicheranordnung
US5712813A (en) * 1996-10-17 1998-01-27 Zhang; Guobiao Multi-level storage capacitor structure with improved memory density
DE19705530C2 (de) * 1997-02-13 1999-03-11 Siemens Ag Verfahren zur Erzeugung eines Kontaktes und eines Kondensators in einem Halblieterbauelement
KR19990038862A (ko) * 1997-11-07 1999-06-05 성재갑 안료를 함유한 수중실리콘 유화형 화장료 조성물
KR100334575B1 (ko) * 1999-07-05 2002-05-03 윤종용 반도체 메모리 제조 방법
KR100327709B1 (ko) * 1999-12-23 2002-03-09 성재갑 왁스를 함유하지 않는 오일-프리형 실리콘중수 유화형화장료 조성물
US6800890B1 (en) * 2002-12-30 2004-10-05 Infineon Technologies Aktiengesellschaft Memory architecture with series grouped by cells
US8169014B2 (en) * 2006-01-09 2012-05-01 Taiwan Semiconductor Manufacturing Co., Ltd. Interdigitated capacitive structure for an integrated circuit
KR101934426B1 (ko) * 2012-11-26 2019-01-03 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US9959974B2 (en) * 2015-02-27 2018-05-01 The United States Of America As Represented By The Secretary Of The Army Method for making a structural capacitor
US10622318B2 (en) * 2017-04-26 2020-04-14 Advanced Semiconductor Engineering Korea, Inc. Semiconductor package device and method of manufacturing the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59231851A (ja) * 1983-06-14 1984-12-26 Nippon Telegr & Teleph Corp <Ntt> 半導体メモリセル
JPH0682783B2 (ja) * 1985-03-29 1994-10-19 三菱電機株式会社 容量およびその製造方法
DE3856143T2 (de) * 1987-06-17 1998-10-29 Fujitsu Ltd Verfahren zum Herstellen einer dynamischen Speicherzelle mit wahlfreiem Zugriff
KR910009805B1 (ko) * 1987-11-25 1991-11-30 후지쓰 가부시끼가이샤 다이나믹 랜덤 액세스 메모리 장치와 그의 제조방법
JPH01265556A (ja) * 1988-04-15 1989-10-23 Fujitsu Ltd 半導体記憶装置及びその製造方法
KR910010167B1 (ko) * 1988-06-07 1991-12-17 삼성전자 주식회사 스택 캐패시터 dram셀 및 그의 제조방법
JPH0240949A (ja) * 1988-07-30 1990-02-09 Sony Corp メモリ装置
EP0370407A1 (en) * 1988-11-18 1990-05-30 Nec Corporation Semiconductor memory device of one transistor - one capacitor memory cell type
US5006481A (en) * 1989-11-30 1991-04-09 Sgs-Thomson Microelectronics, Inc. Method of making a stacked capacitor DRAM cell
JPH03173176A (ja) * 1989-11-30 1991-07-26 Sharp Corp 半導体記憶装置

Also Published As

Publication number Publication date
DE4029256A1 (de) 1992-01-09
DE4029256C2 (de) 1994-02-03
KR930007192B1 (ko) 1993-07-31
IT9048323A1 (it) 1992-03-28
US5187548A (en) 1993-02-16
GB2245761B (en) 1994-11-23
GB9021200D0 (en) 1990-11-14
FR2664098A1 (fr) 1992-01-03
GB2245761A (en) 1992-01-08
JP2538119B2 (ja) 1996-09-25
IT1242357B (it) 1994-03-04
KR920001761A (ko) 1992-01-30
JPH0461159A (ja) 1992-02-27
FR2664098B1 (fr) 1997-07-04

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970829