IT8621919A0 - Circuito di memoria ad accesso casuale a sovrapposizione utilizzante semiconduttori del tipo a gate array. - Google Patents
Circuito di memoria ad accesso casuale a sovrapposizione utilizzante semiconduttori del tipo a gate array.Info
- Publication number
- IT8621919A0 IT8621919A0 IT8621919A IT2191986A IT8621919A0 IT 8621919 A0 IT8621919 A0 IT 8621919A0 IT 8621919 A IT8621919 A IT 8621919A IT 2191986 A IT2191986 A IT 2191986A IT 8621919 A0 IT8621919 A0 IT 8621919A0
- Authority
- IT
- Italy
- Prior art keywords
- random access
- access memory
- gate array
- memory circuit
- array type
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/789,213 US4698749A (en) | 1985-10-18 | 1985-10-18 | RAM memory overlay gate array circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8621919A0 true IT8621919A0 (it) | 1986-10-07 |
IT1205314B IT1205314B (it) | 1989-03-15 |
Family
ID=25146929
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT21919/86A IT1205314B (it) | 1985-10-18 | 1986-10-07 | Circuito di memoria ad accesso casuale a sovrapposizione utilizzante semiconduttori del tipo a gate array |
Country Status (4)
Country | Link |
---|---|
US (1) | US4698749A (it) |
BE (1) | BE905612A (it) |
CA (1) | CA1273124A (it) |
IT (1) | IT1205314B (it) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5276812A (en) * | 1987-01-29 | 1994-01-04 | Kabushiki Kaisha Toshiba | Address multiplexing apparatus |
US4903197A (en) * | 1987-02-27 | 1990-02-20 | Bull Hn Information Systems Inc. | Memory bank selection arrangement generating first bits identifying a bank of memory and second bits addressing identified bank |
JPS63282870A (ja) * | 1987-05-14 | 1988-11-18 | Minolta Camera Co Ltd | メモリユニットのアドレス指定方式 |
JPH03196245A (ja) * | 1989-11-09 | 1991-08-27 | Internatl Business Mach Corp <Ibm> | データ処理装置およびコンピュータ装置 |
US5255382A (en) * | 1990-09-24 | 1993-10-19 | Pawloski Martin B | Program memory expander for 8051-based microcontrolled system |
US6223264B1 (en) | 1991-10-24 | 2001-04-24 | Texas Instruments Incorporated | Synchronous dynamic random access memory and data processing system using an address select signal |
JPH1083698A (ja) * | 1996-09-05 | 1998-03-31 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US7475186B2 (en) * | 2003-10-31 | 2009-01-06 | Superspeed Software | System and method for persistent RAM disk |
DE102004003323A1 (de) * | 2004-01-22 | 2005-08-18 | Infineon Technologies Ag | Halbleiterspeichervorrichtung und Schaltungsanordnung |
US9720970B2 (en) * | 2013-06-06 | 2017-08-01 | Oracle International Corporation | Efficient storage and retrieval of fragmented data using pseudo linear dynamic byte array |
US9785687B2 (en) | 2013-06-06 | 2017-10-10 | Oracle International Corporation | System and method for transparent multi key-value weighted attributed connection using uni-tag connection pools |
US9747341B2 (en) | 2013-06-06 | 2017-08-29 | Oracle International Corporation | System and method for providing a shareable global cache for use with a database environment |
US10776378B2 (en) | 2014-07-09 | 2020-09-15 | Oracle Interntional Corporation | System and method for use of immutable accessors with dynamic byte arrays |
US9880938B2 (en) | 2014-09-26 | 2018-01-30 | Oracle International Corporation | System and method for compacting pseudo linear byte array |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4126893A (en) * | 1977-02-17 | 1978-11-21 | Xerox Corporation | Interrupt request controller for data processing system |
US4080651A (en) * | 1977-02-17 | 1978-03-21 | Xerox Corporation | Memory control processor |
US4158227A (en) * | 1977-10-12 | 1979-06-12 | Bunker Ramo Corporation | Paged memory mapping with elimination of recurrent decoding |
US4340932A (en) * | 1978-05-17 | 1982-07-20 | Harris Corporation | Dual mapping memory expansion unit |
US4393443A (en) * | 1980-05-20 | 1983-07-12 | Tektronix, Inc. | Memory mapping system |
US4410941A (en) * | 1980-12-29 | 1983-10-18 | Wang Laboratories, Inc. | Computer having an indexed local ram to store previously translated virtual addresses |
US4473877A (en) * | 1981-04-16 | 1984-09-25 | Tulk Ronald K | Parasitic memory expansion for computers |
-
1985
- 1985-10-18 US US06/789,213 patent/US4698749A/en not_active Expired - Fee Related
-
1986
- 1986-10-07 IT IT21919/86A patent/IT1205314B/it active
- 1986-10-07 CA CA000519969A patent/CA1273124A/en not_active Expired - Fee Related
- 1986-10-17 BE BE2/61073A patent/BE905612A/fr not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
IT1205314B (it) | 1989-03-15 |
CA1273124A (en) | 1990-08-21 |
US4698749A (en) | 1987-10-06 |
BE905612A (fr) | 1987-02-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
IT8621918A0 (it) | Circuito di ripasso per memoria dinamica utilizzante semiconduttori del tipo a gate array. | |
DE3687322D1 (de) | Halbleiterspeicheranordnung. | |
IT8683630A0 (it) | Dispositivo di memoria non volatile a semiconduttore. | |
DE3786819D1 (de) | Nichtfluechtige halbleiterspeicheranordnung. | |
DE3576013D1 (de) | Nichtfluechtiger halbleiterspeicher. | |
IT8222503A1 (it) | Elaboratore di segnali utilizzante una memoria ad accesso casuale, di tipo controllato | |
DE3671124D1 (de) | Halbleiterspeicherzelle. | |
IT8621919A0 (it) | Circuito di memoria ad accesso casuale a sovrapposizione utilizzante semiconduttori del tipo a gate array. | |
DE3883865D1 (de) | Halbleiterspeicheranordnung mit einem Register. | |
DE3680562D1 (de) | Halbleiterspeicheranordnung. | |
DE3878370T2 (de) | Nichtfluechtige halbleiterspeicheranordnung. | |
DE3686144T2 (de) | Nichtfluechtiger halbleiterspeicher. | |
DE3853038T2 (de) | Nichtflüchtige Halbleiterspeicheranordnung. | |
DE3682346D1 (de) | Halbleiterspeicheranordnung. | |
DE3687284T2 (de) | Halbleiterspeicheranordnung. | |
DE3683783D1 (de) | Halbleiterspeicheranordnung. | |
DE3583669D1 (de) | Nichtfluechtige halbleiterspeicheranordnung. | |
DE3883935T2 (de) | Halbleiterspeicheranordnung mit einem seriellen Zugriffsspeicher. | |
DE3685889T2 (de) | Halbleiterspeicheranordnung. | |
DE3382353D1 (de) | Halbleiterspeicheranordnung mit einem auffrischungsmechanismus. | |
DE3680822D1 (de) | Dekodierschaltung fuer eine halbleiterspeicheranordnung. | |
DE3884820T2 (de) | Nichtflüchtige Halbleiterspeichereinrichtung. | |
DE3586493T2 (de) | Nichtfluechtige halbleiterspeicheranordnung. | |
IT8319718A0 (it) | Di tipo dinamico. memoria a semiconduttori comprendente un circuito di scarica | |
IT8322952A0 (it) | Memoria ad accesso casuale di tipo mos. |