HUP0100338A2 - Eljárás és elrendezés elektronikus alkatrészek és hordozóréteg összekötésére, valamint eljárás összekötés ellenőrzésére - Google Patents

Eljárás és elrendezés elektronikus alkatrészek és hordozóréteg összekötésére, valamint eljárás összekötés ellenőrzésére

Info

Publication number
HUP0100338A2
HUP0100338A2 HU0100338A HUP0100338A HUP0100338A2 HU P0100338 A2 HUP0100338 A2 HU P0100338A2 HU 0100338 A HU0100338 A HU 0100338A HU P0100338 A HUP0100338 A HU P0100338A HU P0100338 A2 HUP0100338 A2 HU P0100338A2
Authority
HU
Hungary
Prior art keywords
contact
connection
electronic components
carrier layer
connecting electronic
Prior art date
Application number
HU0100338A
Other languages
English (en)
Inventor
Jan Benzler
Albert-Andreas Hoebel
Jiang Hongquan
Stefan Rupprecht
Thomas Ruzicka
Gerhard Schmidt
Reiner Schuetz
Original Assignee
Robert Bosch Gmbh.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh. filed Critical Robert Bosch Gmbh.
Publication of HUP0100338A2 publication Critical patent/HUP0100338A2/hu
Publication of HUP0100338A3 publication Critical patent/HUP0100338A3/hu

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
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    • H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
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    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
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    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
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    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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    • H05K2201/09372—Pads and lands
    • H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0465—Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49147—Assembling terminal to base
    • Y10T29/49149—Assembling terminal to base by metal fusion bonding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Wire Bonding (AREA)

Abstract

A találmány tárgya eljárás elektronikus alkatrészek (14) éshordozóréteg (10) összekötésére, melynek során az alkatrész (14)legalább egy csatlakozó érintkezőjét (18) elektromosan vezető módonösszekötik a hordozóréteg (10) felső oldalán levő csatlakozóérintkezővel (18) oly módon, hogy egy forraszgyöngyöt (24) (bump)visznek fel 1egalább egy összekötendő csatlakozó érintkezőre (18), azalkatrészt (14) a hordozóréteggel (10) méretpontosan helyzetbe állítvaösszekötik, és a legalább egy forraszgyöngyöt (24) odaforrasztják azérintkező felületek nedvesítése céljából. A találmány szerintforrasztás közben a legalább egy forraszgyöngyöt (24) az érintkezősíkban oly módon alakítják, hogy annak olyan alakváltozási fokát érikel, amely lehetővé teszi az alakváltozási fok kétdimenzióskiértékelését az összekötési helyről készült röntgenfelvételsegítségével. Ó
HU0100338A 1998-09-01 1999-08-27 Method for connecting electronic components to a substrate, and a method for checking such a connection HUP0100338A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19839760A DE19839760A1 (de) 1998-09-01 1998-09-01 Verfahren zur Verbindung von elektronischen Bauelementen mit einem Trägersubstrat sowie Verfahren zur Überprüfung einer derartigen Verbindung
PCT/DE1999/002670 WO2000013228A1 (de) 1998-09-01 1999-08-27 Verfahren zur verbindung von elektronischen bauelementen mit einem trägersubstrat sowie verfahren zur überprüfung einer derartigen verbindung

Publications (2)

Publication Number Publication Date
HUP0100338A2 true HUP0100338A2 (hu) 2001-06-28
HUP0100338A3 HUP0100338A3 (en) 2004-11-29

Family

ID=7879409

Family Applications (1)

Application Number Title Priority Date Filing Date
HU0100338A HUP0100338A3 (en) 1998-09-01 1999-08-27 Method for connecting electronic components to a substrate, and a method for checking such a connection

Country Status (6)

Country Link
US (1) US6678948B1 (hu)
EP (1) EP1048069A1 (hu)
JP (1) JP2002524854A (hu)
DE (1) DE19839760A1 (hu)
HU (1) HUP0100338A3 (hu)
WO (1) WO2000013228A1 (hu)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2344550A (en) * 1998-12-09 2000-06-14 Ibm Pad design for electronic package
JP3517388B2 (ja) 2000-06-14 2004-04-12 新光電気工業株式会社 バンプの検査方法及びバンプの検査装置
US20060108678A1 (en) * 2002-05-07 2006-05-25 Microfabrica Inc. Probe arrays and method for making
US7253510B2 (en) * 2003-01-16 2007-08-07 International Business Machines Corporation Ball grid array package construction with raised solder ball pads
US10416192B2 (en) 2003-02-04 2019-09-17 Microfabrica Inc. Cantilever microprobes for contacting electronic components
DE10332573B4 (de) * 2003-07-14 2007-08-16 Siemens Ag Verfahren zum Erzeugen von Lotkontakten auf Bauelementen
USRE44500E1 (en) 2003-11-10 2013-09-17 Stats Chippac, Ltd. Semiconductor device and method of forming composite bump-on-lead interconnection
US20070105277A1 (en) * 2004-11-10 2007-05-10 Stats Chippac Ltd. Solder joint flip chip interconnection
US8674500B2 (en) 2003-12-31 2014-03-18 Stats Chippac, Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
US8076232B2 (en) * 2008-04-03 2011-12-13 Stats Chippac, Ltd. Semiconductor device and method of forming composite bump-on-lead interconnection
US8026128B2 (en) * 2004-11-10 2011-09-27 Stats Chippac, Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
US7901983B2 (en) * 2004-11-10 2011-03-08 Stats Chippac, Ltd. Bump-on-lead flip chip interconnection
US7659633B2 (en) * 2004-11-10 2010-02-09 Stats Chippac, Ltd. Solder joint flip chip interconnection having relief structure
US8350384B2 (en) * 2009-11-24 2013-01-08 Stats Chippac, Ltd. Semiconductor device and method of forming electrical interconnect with stress relief void
US9029196B2 (en) 2003-11-10 2015-05-12 Stats Chippac, Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
USRE47600E1 (en) 2003-11-10 2019-09-10 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming electrical interconnect with stress relief void
US8574959B2 (en) 2003-11-10 2013-11-05 Stats Chippac, Ltd. Semiconductor device and method of forming bump-on-lead interconnection
US8129841B2 (en) 2006-12-14 2012-03-06 Stats Chippac, Ltd. Solder joint flip chip interconnection
KR101237172B1 (ko) * 2003-11-10 2013-02-25 스태츠 칩팩, 엘티디. 범프-온-리드 플립 칩 인터커넥션
US8216930B2 (en) 2006-12-14 2012-07-10 Stats Chippac, Ltd. Solder joint flip chip interconnection having relief structure
TWI230994B (en) * 2004-02-25 2005-04-11 Via Tech Inc Circuit carrier
US20060049238A1 (en) * 2004-09-03 2006-03-09 Lim Seong C Solderable structures and methods for soldering
US8841779B2 (en) * 2005-03-25 2014-09-23 Stats Chippac, Ltd. Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate
WO2006105015A2 (en) 2005-03-25 2006-10-05 Stats Chippac Ltd. Flip chip interconnection having narrow interconnection sites on the substrate
JP2007059638A (ja) * 2005-08-25 2007-03-08 Nec Corp 半導体装置およびその製造方法
JP2007324528A (ja) * 2006-06-05 2007-12-13 Alps Electric Co Ltd 半田接続構造の検査方法、及びその半田接続構造
US7772104B2 (en) * 2007-02-02 2010-08-10 Freescale Semiconductor, Inc. Dynamic pad size to reduce solder fatigue
JP5207659B2 (ja) * 2007-05-22 2013-06-12 キヤノン株式会社 半導体装置
DE102008059793A1 (de) * 2008-12-01 2010-06-10 Grenzebach Maschinenbau Gmbh Verfahren und Vorrichtung zum vollautomatischen Selektieren und Verpacken von photovoltaischen Modulen
US8198186B2 (en) 2008-12-31 2012-06-12 Stats Chippac, Ltd. Semiconductor device and method of confining conductive bump material during reflow with solder mask patch
US8659172B2 (en) 2008-12-31 2014-02-25 Stats Chippac, Ltd. Semiconductor device and method of confining conductive bump material with solder mask patch
TWI498982B (zh) * 2009-12-08 2015-09-01 史達晶片有限公司 在以焊料遮罩補綴的回焊期間局限導電凸塊材料的半導體裝置和方法
US9685402B2 (en) * 2011-12-13 2017-06-20 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming recesses in conductive layer to detect continuity for interconnect between semiconductor die and substrate
US8810020B2 (en) * 2012-06-22 2014-08-19 Freescale Semiconductor, Inc. Semiconductor device with redistributed contacts
WO2014024338A1 (ja) * 2012-08-10 2014-02-13 パナソニック株式会社 部品実装基板の製造方法及び製造システム
DE112012006875T5 (de) * 2012-09-04 2015-06-03 Mitsubishi Electric Corporation Halbleitervorrichtung und Herstellungsverfahren für eine Halbleitervorrichtung
DE102017208759A1 (de) 2017-05-23 2018-11-29 Robert Bosch Gmbh Anordnung umfassend ein Trägersubstrat und ein damit verbundenes elektronisches Bauelement sowie Verfahren zu dessen Herstellung
US11262383B1 (en) 2018-09-26 2022-03-01 Microfabrica Inc. Probes having improved mechanical and/or electrical properties for making contact between electronic circuit elements and methods for making
WO2023136078A1 (ja) * 2022-01-14 2023-07-20 ローム株式会社 半導体装置

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4029963A (en) * 1976-07-30 1977-06-14 The Board Of Trustees Of Leland Stanford Junior University X-ray spectral decomposition imaging system
JPS6038839A (ja) * 1983-08-12 1985-02-28 Hitachi Ltd フリツプチツプ型半導体装置
GB8806232D0 (en) * 1988-03-16 1988-04-13 Plessey Co Plc Vernier structure for flip chip bonded devices
US4852131A (en) * 1988-05-13 1989-07-25 Advanced Research & Applications Corporation Computed tomography inspection of electronic devices
US4940633A (en) * 1989-05-26 1990-07-10 Hermansen Ralph D Method of bonding metals with a radio-opaque adhesive/sealant for void detection and product made
US5184768A (en) * 1990-11-29 1993-02-09 Motorola, Inc. Solder interconnection verification
JP2555811B2 (ja) 1991-09-10 1996-11-20 富士通株式会社 半導体チップのフリップチップ接合方法
US5246880A (en) * 1992-04-27 1993-09-21 Eastman Kodak Company Method for creating substrate electrodes for flip chip and other applications
US5489750A (en) * 1993-03-11 1996-02-06 Matsushita Electric Industrial Co., Ltd. Method of mounting an electronic part with bumps on a circuit board
US5371328A (en) * 1993-08-20 1994-12-06 International Business Machines Corporation Component rework
US5539153A (en) * 1994-08-08 1996-07-23 Hewlett-Packard Company Method of bumping substrates by contained paste deposition
AU3415095A (en) * 1994-09-06 1996-03-27 Sheldahl, Inc. Printed circuit substrate having unpackaged integrated circuit chips directly mounted thereto and method of manufacture
KR0157284B1 (ko) * 1995-05-31 1999-02-18 김광호 솔더 볼 장착홈을 갖는 인쇄 회로 기판과 이를 사용한 볼 그리드 어레이 패키지
JPH0982760A (ja) * 1995-07-07 1997-03-28 Toshiba Corp 半導体装置、半導体素子およびその半田接続部検査方法
DE19640192A1 (de) 1996-09-30 1998-04-02 Bosch Gmbh Robert Verfahren zur Flip-Chip-Montage
US5938452A (en) * 1996-12-23 1999-08-17 General Electric Company Flexible interface structures for electronic devices
EP1025587A4 (en) * 1997-07-21 2000-10-04 Aguila Technologies Inc SEMICONDUCTOR FLIPCHIP PACK AND PRODUCTION METHOD THEREFOR
US6009145A (en) * 1998-02-11 1999-12-28 Glenbrook Technologies Inc. Ball grid array re-work assembly with X-ray inspection system

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DE19839760A1 (de) 2000-03-02
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US6678948B1 (en) 2004-01-20
JP2002524854A (ja) 2002-08-06

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