HK1005005A1 - Semiconductor device with self-aligned contacts and the method of fabrication - Google Patents
Semiconductor device with self-aligned contacts and the method of fabricationInfo
- Publication number
- HK1005005A1 HK1005005A1 HK98104170A HK98104170A HK1005005A1 HK 1005005 A1 HK1005005 A1 HK 1005005A1 HK 98104170 A HK98104170 A HK 98104170A HK 98104170 A HK98104170 A HK 98104170A HK 1005005 A1 HK1005005 A1 HK 1005005A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- regions
- insulated
- contacts
- self
- semiconductor device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Bipolar Transistors (AREA)
- Drying Of Semiconductors (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP95107911A EP0749156B1 (de) | 1995-05-23 | 1995-05-23 | Halbleiteranordnung mit selbstjustierten Kontakten und Verfahren zu ihrer Herstellung |
Publications (1)
Publication Number | Publication Date |
---|---|
HK1005005A1 true HK1005005A1 (en) | 1998-12-18 |
Family
ID=8219283
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK98104170A HK1005005A1 (en) | 1995-05-23 | 1998-05-14 | Semiconductor device with self-aligned contacts and the method of fabrication |
Country Status (8)
Country | Link |
---|---|
US (1) | US5864155A (ja) |
EP (1) | EP0749156B1 (ja) |
JP (1) | JP3863219B2 (ja) |
KR (1) | KR100520693B1 (ja) |
AT (1) | ATE183335T1 (ja) |
DE (1) | DE59506590D1 (ja) |
HK (1) | HK1005005A1 (ja) |
TW (1) | TW294828B (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5811350A (en) * | 1996-08-22 | 1998-09-22 | Micron Technology, Inc. | Method of forming contact openings and an electronic component formed from the same and other methods |
JP3405508B2 (ja) * | 1997-05-30 | 2003-05-12 | 富士通株式会社 | 半導体集積回路 |
US6261948B1 (en) | 1998-07-31 | 2001-07-17 | Micron Technology, Inc. | Method of forming contact openings |
US6380023B2 (en) * | 1998-09-02 | 2002-04-30 | Micron Technology, Inc. | Methods of forming contacts, methods of contacting lines, methods of operating integrated circuitry, and integrated circuits |
JP3394914B2 (ja) * | 1998-09-09 | 2003-04-07 | 株式会社東芝 | 半導体装置およびその製造方法 |
KR100560632B1 (ko) * | 1998-10-01 | 2006-05-25 | 삼성전자주식회사 | 금속 샐러사이드를 이용한 반도체 장치의 제조방법 |
US6261924B1 (en) | 2000-01-21 | 2001-07-17 | Infineon Technologies Ag | Maskless process for self-aligned contacts |
US7326611B2 (en) * | 2005-02-03 | 2008-02-05 | Micron Technology, Inc. | DRAM arrays, vertical transistor structures and methods of forming transistor structures and DRAM arrays |
US9104211B2 (en) | 2010-11-19 | 2015-08-11 | Google Inc. | Temperature controller with model-based time to target calculation and display |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR890004962B1 (ko) * | 1985-02-08 | 1989-12-02 | 가부시끼가이샤 도오시바 | 반도체장치 및 그 제조방법 |
JPH0799738B2 (ja) * | 1985-09-05 | 1995-10-25 | 三菱電機株式会社 | 半導体装置の製造方法 |
US5235199A (en) * | 1988-03-25 | 1993-08-10 | Kabushiki Kaisha Toshiba | Semiconductor memory with pad electrode and bit line under stacked capacitor |
US4877755A (en) * | 1988-05-31 | 1989-10-31 | Texas Instruments Incorporated | Method of forming silicides having different thicknesses |
NL8903158A (nl) * | 1989-12-27 | 1991-07-16 | Philips Nv | Werkwijze voor het contacteren van silicidesporen. |
JP2524862B2 (ja) * | 1990-05-01 | 1996-08-14 | 三菱電機株式会社 | 半導体記憶装置およびその製造方法 |
KR920008294B1 (ko) * | 1990-05-08 | 1992-09-26 | 금성일렉트론 주식회사 | 반도체 장치의 제조방법 |
DE59308761D1 (de) | 1992-04-29 | 1998-08-20 | Siemens Ag | Verfahren zur Herstellung eines Kontaktlochs zu einem dotierten Bereich |
US5530276A (en) * | 1993-01-21 | 1996-06-25 | Nippon Steel Corporation | Nonvolatile semiconductor memory device |
KR0137229B1 (ko) * | 1993-02-01 | 1998-04-29 | 모리시다 요이찌 | 반도체 기억장치 및 그 제조방법 |
JP2570100B2 (ja) * | 1993-05-16 | 1997-01-08 | 日本電気株式会社 | 半導体記憶装置 |
-
1995
- 1995-05-23 AT AT95107911T patent/ATE183335T1/de not_active IP Right Cessation
- 1995-05-23 DE DE59506590T patent/DE59506590D1/de not_active Expired - Lifetime
- 1995-05-23 EP EP95107911A patent/EP0749156B1/de not_active Expired - Lifetime
-
1996
- 1996-05-21 TW TW085105973A patent/TW294828B/zh not_active IP Right Cessation
- 1996-05-22 JP JP14973696A patent/JP3863219B2/ja not_active Expired - Lifetime
- 1996-05-23 KR KR1019960017628A patent/KR100520693B1/ko not_active IP Right Cessation
- 1996-05-23 US US08/651,305 patent/US5864155A/en not_active Expired - Lifetime
-
1998
- 1998-05-14 HK HK98104170A patent/HK1005005A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR960043230A (ko) | 1996-12-23 |
TW294828B (ja) | 1997-01-01 |
EP0749156B1 (de) | 1999-08-11 |
KR100520693B1 (ko) | 2006-06-08 |
DE59506590D1 (de) | 1999-09-16 |
JP3863219B2 (ja) | 2006-12-27 |
JPH08330548A (ja) | 1996-12-13 |
ATE183335T1 (de) | 1999-08-15 |
US5864155A (en) | 1999-01-26 |
EP0749156A1 (de) | 1996-12-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |