TW354427B - Method for fabricating a stage-like capacitor of a dynamic random access memory - Google Patents

Abstract

A method for fabricating a capacitor on a semiconductor substrate, comprising: forming a first dielectric layer on the semiconductor substrate; etching the first dielectric layer to form with a contact hole; forming a first polysilicon layer on the first dielectric layer and the contact layer; forming a stack layer on the first polysilicon layer, the stack layer include at least one first vice layer, a second vice layer, and a third vice layer, in a specific etching condition, the etching speed is lower than other vice layer, and located at the top of the stack layer; etching the stack layer to the first polysilicon layer; in the specific condition, etching the stack layer, wherein in the specific condition, the first vice layer, second vice layer, third vice layer have different etching speed; forming a second polysilicon layer for covering the stack layer, part of the first polysilicon layer, and part of the first dielectric layer; etching the second polysilicon layer, for exposing the first vice layer of the stack layer, and part of the first dielectric layer, removing the stack layer for forming a first storage electrode of the capacitor; forming a second dielectric layer on the surface of second storage electrode, forming a conductive layer on the second dielectric layer as a second storage electrode of the capacitor.