GB2420443B - Increasing die strength by etching during or after dicing - Google Patents

Increasing die strength by etching during or after dicing

Info

Publication number
GB2420443B
GB2420443B GB0424195A GB0424195A GB2420443B GB 2420443 B GB2420443 B GB 2420443B GB 0424195 A GB0424195 A GB 0424195A GB 0424195 A GB0424195 A GB 0424195A GB 2420443 B GB2420443 B GB 2420443B
Authority
GB
United Kingdom
Prior art keywords
dicing
carrier
semiconductor wafer
etching during
die strength
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0424195A
Other languages
English (en)
Other versions
GB2420443A (en
GB0424195D0 (en
Inventor
Adrian Boyle
David Gillen
Richard Toftness
Kali Dunne
Eva Fernandes Gomez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xsil Technology Ltd
Electro Scientific Industries Inc
Original Assignee
Xsil Technology Ltd
Electro Scientific Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xsil Technology Ltd, Electro Scientific Industries Inc filed Critical Xsil Technology Ltd
Priority to GB0424195A priority Critical patent/GB2420443B/en
Publication of GB0424195D0 publication Critical patent/GB0424195D0/en
Priority to TW094138107A priority patent/TWI278032B/zh
Priority to PCT/EP2005/011671 priority patent/WO2006048230A1/en
Priority to AT05808203T priority patent/ATE526681T1/de
Priority to EP05808203A priority patent/EP1825507B1/en
Priority to US11/666,796 priority patent/US20090191690A1/en
Priority to CN2005800441751A priority patent/CN101088157B/zh
Priority to JP2007538353A priority patent/JP4690417B2/ja
Priority to KR1020077008211A priority patent/KR20070051360A/ko
Publication of GB2420443A publication Critical patent/GB2420443A/en
Application granted granted Critical
Publication of GB2420443B publication Critical patent/GB2420443B/en
Priority to JP2010016318A priority patent/JP2010147488A/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H01L21/3065
    • H01L21/78
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Dicing (AREA)
  • Weting (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Polishing Bodies And Polishing Tools (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
GB0424195A 2004-11-01 2004-11-01 Increasing die strength by etching during or after dicing Expired - Fee Related GB2420443B (en)

Priority Applications (10)

Application Number Priority Date Filing Date Title
GB0424195A GB2420443B (en) 2004-11-01 2004-11-01 Increasing die strength by etching during or after dicing
TW094138107A TWI278032B (en) 2004-11-01 2005-10-31 Increasing die strength by etching during or after dicing
PCT/EP2005/011671 WO2006048230A1 (en) 2004-11-01 2005-11-01 Increasing die strength by etching during or after dicing
AT05808203T ATE526681T1 (de) 2004-11-01 2005-11-01 Vergrössern der chipbelastungsfähigkeit durch ätzen während oder nach des zerteilens
EP05808203A EP1825507B1 (en) 2004-11-01 2005-11-01 Increasing die strength by etching during or after dicing
US11/666,796 US20090191690A1 (en) 2004-11-01 2005-11-01 Increasing Die Strength by Etching During or After Dicing
CN2005800441751A CN101088157B (zh) 2004-11-01 2005-11-01 通过在分割期间或之后进行蚀刻来增强晶片强度
JP2007538353A JP4690417B2 (ja) 2004-11-01 2005-11-01 半導体ウエハのダイシング方法及びダイシング装置
KR1020077008211A KR20070051360A (ko) 2004-11-01 2005-11-01 웨이퍼 다이싱 과정 중 또는 다이싱 과정 이후 에칭에 의해다이 강도를 증가시키는 방법
JP2010016318A JP2010147488A (ja) 2004-11-01 2010-01-28 ダイシング中あるいは後のエッチングによるダイ強度の増加

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0424195A GB2420443B (en) 2004-11-01 2004-11-01 Increasing die strength by etching during or after dicing

Publications (3)

Publication Number Publication Date
GB0424195D0 GB0424195D0 (en) 2004-12-01
GB2420443A GB2420443A (en) 2006-05-24
GB2420443B true GB2420443B (en) 2009-09-16

Family

ID=33515886

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0424195A Expired - Fee Related GB2420443B (en) 2004-11-01 2004-11-01 Increasing die strength by etching during or after dicing

Country Status (9)

Country Link
US (1) US20090191690A1 (https=)
EP (1) EP1825507B1 (https=)
JP (2) JP4690417B2 (https=)
KR (1) KR20070051360A (https=)
CN (1) CN101088157B (https=)
AT (1) ATE526681T1 (https=)
GB (1) GB2420443B (https=)
TW (1) TWI278032B (https=)
WO (1) WO2006048230A1 (https=)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101037142B1 (ko) * 2002-04-19 2011-05-26 일렉트로 사이언티픽 인더스트리즈, 아이엔씨 펄스 레이저를 이용한 기판의 프로그램 제어 다이싱
JP2008159985A (ja) * 2006-12-26 2008-07-10 Matsushita Electric Ind Co Ltd 半導体チップの製造方法
JP2009111147A (ja) * 2007-10-30 2009-05-21 Denso Corp 半導体チップ及びその製造方法
GB2458475B (en) * 2008-03-18 2011-10-26 Xsil Technology Ltd Processing of multilayer semiconductor wafers
GB2459301B (en) * 2008-04-18 2011-09-14 Xsil Technology Ltd A method of dicing wafers to give high die strength
GB2459302A (en) * 2008-04-18 2009-10-21 Xsil Technology Ltd A method of dicing wafers to give high die strength
KR101140369B1 (ko) * 2010-03-26 2012-05-03 최선규 이플루오르화크세논을 이용한 기판 가공장치 및 다이싱 방법
US8071429B1 (en) 2010-11-24 2011-12-06 Omnivision Technologies, Inc. Wafer dicing using scribe line etch
US8666530B2 (en) * 2010-12-16 2014-03-04 Electro Scientific Industries, Inc. Silicon etching control method and system
US8673741B2 (en) * 2011-06-24 2014-03-18 Electro Scientific Industries, Inc Etching a laser-cut semiconductor before dicing a die attach film (DAF) or other material layer
US8361828B1 (en) * 2011-08-31 2013-01-29 Alta Devices, Inc. Aligned frontside backside laser dicing of semiconductor films
US8399281B1 (en) * 2011-08-31 2013-03-19 Alta Devices, Inc. Two beam backside laser dicing of semiconductor films
US8536025B2 (en) * 2011-12-12 2013-09-17 International Business Machines Corporation Resized wafer with a negative photoresist ring and design structures thereof
US8952413B2 (en) 2012-03-08 2015-02-10 Micron Technology, Inc. Etched trenches in bond materials for die singulation, and associated systems and methods
US9034733B2 (en) 2012-08-20 2015-05-19 Semiconductor Components Industries, Llc Semiconductor die singulation method
US8664089B1 (en) * 2012-08-20 2014-03-04 Semiconductor Components Industries, Llc Semiconductor die singulation method
JP6166034B2 (ja) * 2012-11-22 2017-07-19 株式会社ディスコ ウエーハの加工方法
US8980726B2 (en) * 2013-01-25 2015-03-17 Applied Materials, Inc. Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers
EP2956306A4 (en) 2013-02-13 2017-01-11 Hewlett-Packard Development Company, L.P. Fluid ejection device
US9472458B2 (en) 2014-06-04 2016-10-18 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
JP6282194B2 (ja) * 2014-07-30 2018-02-21 株式会社ディスコ ウェーハの加工方法
US9601437B2 (en) 2014-09-09 2017-03-21 Nxp B.V. Plasma etching and stealth dicing laser process
US9337098B1 (en) 2015-08-14 2016-05-10 Semiconductor Components Industries, Llc Semiconductor die back layer separation method
JP6587911B2 (ja) * 2015-11-16 2019-10-09 株式会社ディスコ ウエーハの分割方法
CN108630599A (zh) * 2017-03-22 2018-10-09 东莞新科技术研究开发有限公司 芯片的形成方法
US10373869B2 (en) 2017-05-24 2019-08-06 Semiconductor Components Industries, Llc Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus
CN107579032B (zh) * 2017-07-27 2019-04-09 厦门市三安集成电路有限公司 一种化合物半导体器件的背面制程方法
JP7066263B2 (ja) * 2018-01-23 2022-05-13 株式会社ディスコ 加工方法、エッチング装置、及びレーザ加工装置
US10916474B2 (en) 2018-06-25 2021-02-09 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
CN110634796A (zh) 2018-06-25 2019-12-31 半导体元件工业有限责任公司 用于处理电子管芯的方法及半导体晶圆和管芯的切单方法
JP7109862B2 (ja) * 2018-07-10 2022-08-01 株式会社ディスコ 半導体ウェーハの加工方法
US11217550B2 (en) 2018-07-24 2022-01-04 Xilinx, Inc. Chip package assembly with enhanced interconnects and method for fabricating the same
JP7296835B2 (ja) 2019-09-19 2023-06-23 株式会社ディスコ ウェーハの処理方法、及び、チップ測定装置

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4610079A (en) * 1980-01-22 1986-09-09 Tokyo Shibaura Denki Kabushiki Kaisha Method of dicing a semiconductor wafer
JPH02305450A (ja) * 1989-05-19 1990-12-19 Mitsubishi Electric Corp 加速度センサの製造方法
JPH03183153A (ja) * 1989-12-12 1991-08-09 Fujitsu Ltd 半導体装置の製造方法
JPH07201784A (ja) * 1994-01-07 1995-08-04 Fujitsu Ltd 半導体装置の製造方法
US20020013061A1 (en) * 1996-10-29 2002-01-31 Oleg Siniaguine Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
US6730579B1 (en) * 1999-02-05 2004-05-04 Sharp Kabushiki Kaisha Method of manufacturing a semiconductor dice by partially dicing the substrate and subsequent chemical etching
US20040137700A1 (en) * 2002-02-25 2004-07-15 Kazuma Sekiya Method for dividing semiconductor wafer
JP2004260075A (ja) * 2003-02-27 2004-09-16 Seiko Epson Corp 半導体チップの製造方法、半導体チップ、電気光学装置、および電子機器
US20040182817A1 (en) * 2002-12-10 2004-09-23 Hidetoshi Murai Method for manufacturing electro-optical device, electro-optical device, and electronic apparatus
US20040212047A1 (en) * 2003-04-22 2004-10-28 Joshi Subhash M. Edge arrangements for integrated circuit chips
JP2005280832A (ja) * 2004-03-27 2005-10-13 Michiaki Ito 収容袋巻装体

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4190488A (en) * 1978-08-21 1980-02-26 International Business Machines Corporation Etching method using noble gas halides
US4355457A (en) * 1980-10-29 1982-10-26 Rca Corporation Method of forming a mesa in a semiconductor device with subsequent separation into individual devices
US4478677A (en) * 1983-12-22 1984-10-23 International Business Machines Corporation Laser induced dry etching of vias in glass with non-contact masking
JPH07273068A (ja) * 1994-03-30 1995-10-20 Nec Kansai Ltd ダイシング装置
GB2320615B (en) * 1996-12-19 2001-06-20 Lintec Corp Process for producing a chip and pressure sensitive adhesive sheet for said process
WO1998032163A1 (en) * 1997-01-22 1998-07-23 California Institute Of Technology Gas phase silicon etching with bromine trifluoride
JP2000091274A (ja) * 1998-09-17 2000-03-31 Hitachi Ltd 半導体チップの形成方法およびそれを用いた半導体装置の製造方法
JP2000114204A (ja) * 1998-10-01 2000-04-21 Mitsubishi Electric Corp ウエハシート及びこれを用いた半導体装置の製造方法並びに半導体製造装置
US6413839B1 (en) * 1998-10-23 2002-07-02 Emcore Corporation Semiconductor device separation using a patterned laser projection
DE19919471A1 (de) * 1999-04-29 2000-11-09 Bosch Gmbh Robert Verfahren zur Beseitigung von Defekten von Siliziumkörpern durch selektive Ätzung
US6420245B1 (en) * 1999-06-08 2002-07-16 Kulicke & Soffa Investments, Inc. Method for singulating semiconductor wafers
US6290864B1 (en) * 1999-10-26 2001-09-18 Reflectivity, Inc. Fluoride gas etching of silicon with improved selectivity
US6586707B2 (en) * 2000-10-26 2003-07-01 Xsil Technology Limited Control of laser machining
US6465344B1 (en) * 2001-03-09 2002-10-15 Indigo Systems Corporation Crystal thinning method for improved yield and reliability
US6642127B2 (en) * 2001-10-19 2003-11-04 Applied Materials, Inc. Method for dicing a semiconductor wafer
JP2003197569A (ja) * 2001-12-28 2003-07-11 Disco Abrasive Syst Ltd 半導体チップの製造方法
BRPI0308319B1 (pt) * 2002-03-11 2015-06-09 Beaver Visitec Int Us Inc Método para fabricar um dispositivo de corte de material cristalino e método para fabricar uma lâmina cirúrgica de material cristalino
KR101037142B1 (ko) * 2002-04-19 2011-05-26 일렉트로 사이언티픽 인더스트리즈, 아이엔씨 펄스 레이저를 이용한 기판의 프로그램 제어 다이싱
US6817776B2 (en) * 2002-11-19 2004-11-16 International Business Machines Corporation Method of bonding optical fibers and optical fiber assembly
GB2399311B (en) * 2003-03-04 2005-06-15 Xsil Technology Ltd Laser machining using an active assist gas
US7265034B2 (en) * 2005-02-18 2007-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Method of cutting integrated circuit chips from wafer by ablating with laser and cutting with saw blade
KR101313435B1 (ko) * 2005-08-23 2013-10-01 잭틱스 인코포레이티드 펄스 에칭 냉각

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4610079A (en) * 1980-01-22 1986-09-09 Tokyo Shibaura Denki Kabushiki Kaisha Method of dicing a semiconductor wafer
JPH02305450A (ja) * 1989-05-19 1990-12-19 Mitsubishi Electric Corp 加速度センサの製造方法
JPH03183153A (ja) * 1989-12-12 1991-08-09 Fujitsu Ltd 半導体装置の製造方法
JPH07201784A (ja) * 1994-01-07 1995-08-04 Fujitsu Ltd 半導体装置の製造方法
US20020013061A1 (en) * 1996-10-29 2002-01-31 Oleg Siniaguine Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
US6730579B1 (en) * 1999-02-05 2004-05-04 Sharp Kabushiki Kaisha Method of manufacturing a semiconductor dice by partially dicing the substrate and subsequent chemical etching
US20040137700A1 (en) * 2002-02-25 2004-07-15 Kazuma Sekiya Method for dividing semiconductor wafer
US20040182817A1 (en) * 2002-12-10 2004-09-23 Hidetoshi Murai Method for manufacturing electro-optical device, electro-optical device, and electronic apparatus
JP2004260075A (ja) * 2003-02-27 2004-09-16 Seiko Epson Corp 半導体チップの製造方法、半導体チップ、電気光学装置、および電子機器
US20040212047A1 (en) * 2003-04-22 2004-10-28 Joshi Subhash M. Edge arrangements for integrated circuit chips
JP2005280832A (ja) * 2004-03-27 2005-10-13 Michiaki Ito 収容袋巻装体

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Investigation and simulation of isotropic etching of silicon. J. Vac. Sci. Technol, 20(6), pages 1850-1854 (2002) *
Modeling and characterization of sacrificial polysilicon etching using vapour-phase xenon difluoride. 17th IEEE international conference on Micro Electro Mechanical Systems (MEMS), pages 737-740 (September 2004). *

Also Published As

Publication number Publication date
JP2010147488A (ja) 2010-07-01
US20090191690A1 (en) 2009-07-30
TW200625435A (en) 2006-07-16
KR20070051360A (ko) 2007-05-17
JP2008518450A (ja) 2008-05-29
TWI278032B (en) 2007-04-01
JP4690417B2 (ja) 2011-06-01
CN101088157B (zh) 2010-06-23
CN101088157A (zh) 2007-12-12
EP1825507A1 (en) 2007-08-29
ATE526681T1 (de) 2011-10-15
EP1825507B1 (en) 2011-09-28
WO2006048230A1 (en) 2006-05-11
GB2420443A (en) 2006-05-24
GB0424195D0 (en) 2004-12-01

Similar Documents

Publication Publication Date Title
GB2420443B (en) Increasing die strength by etching during or after dicing
JP2008518450A5 (https=)
WO2009063620A1 (ja) プラズマダイシング装置および半導体チップの製造方法
AU2003230752A8 (en) Method of etching substrates
TW200618068A (en) Strained semiconductor devices and method for forming at least a portion thereof
ATE432532T1 (de) Herstellungsverfahren für halbleiterchips
TW200721305A (en) Semiconductor device structures and methods of forming semiconductor structures
TW200618100A (en) Sacrificial substrate for etching
EP2267761A3 (en) Graphene wafer, method for manufacturing the graphene wafer, method for releasing a graphene layer, and method for manufacturing a graphene device
WO2009057764A1 (ja) エッチング方法およびそれを用いた光/電子デバイスの製造方法
US9209083B2 (en) Integrated circuit manufacturing for low-profile and flexible devices
TW200721452A (en) Novel method for intgegrating silicon CMOS and ALGaN/GaN wideband amplifiers on engineered substrates
EP1884989A3 (en) Semiconductor device and method of manufacturing the same
SG144121A1 (en) Nitride semiconductor substrate and manufacturing method thereof
TW200631068A (en) Method for manufacturing bonded wafer and bonded wafer
WO2003046968A1 (fr) Procede de production d'une tranche de silicone, tranche de silicone et tranche soi
WO2006095566A8 (en) Nitride semiconductor light-emitting device and method for fabrication thereof
TW200615715A (en) Semiconductor processing using energized hydrogen gas and in combination with wet cleaning
ATE528139T1 (de) VERFAHREN ZUR HERSTELLUNG EINES SUBSTRATS FÜR EINEN FLÜSSIGKEITSAUSSTOßKOPF
TW200710991A (en) Semiconductor structures formed on substrates and methods of manufacturing the same
TW200643607A (en) Process for producing sublithographic structures
TW200710988A (en) Method for etching a trench in a semiconductor substrate
KR101116944B1 (ko) 집적 회로의 제조 방법
GB2435170A (en) Ultra lightweight photovoltaic device and method for its manufacture
TW200717703A (en) Semiconductor device and method for producting the same

Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20090514 AND 20090520

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20171101