ATE432532T1 - Herstellungsverfahren für halbleiterchips - Google Patents

Herstellungsverfahren für halbleiterchips

Info

Publication number
ATE432532T1
ATE432532T1 AT05822800T AT05822800T ATE432532T1 AT E432532 T1 ATE432532 T1 AT E432532T1 AT 05822800 T AT05822800 T AT 05822800T AT 05822800 T AT05822800 T AT 05822800T AT E432532 T1 ATE432532 T1 AT E432532T1
Authority
AT
Austria
Prior art keywords
protective sheet
semiconductor chips
teg
production process
regions
Prior art date
Application number
AT05822800T
Other languages
English (en)
Inventor
Kiyoshi Arita
Akira Nakagawa
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Application granted granted Critical
Publication of ATE432532T1 publication Critical patent/ATE432532T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
AT05822800T 2004-12-24 2005-12-21 Herstellungsverfahren für halbleiterchips ATE432532T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004373022A JP4288229B2 (ja) 2004-12-24 2004-12-24 半導体チップの製造方法
PCT/JP2005/023991 WO2006068284A1 (en) 2004-12-24 2005-12-21 Manufacturing method for semiconductor chips

Publications (1)

Publication Number Publication Date
ATE432532T1 true ATE432532T1 (de) 2009-06-15

Family

ID=36128239

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05822800T ATE432532T1 (de) 2004-12-24 2005-12-21 Herstellungsverfahren für halbleiterchips

Country Status (9)

Country Link
US (1) US7678670B2 (de)
EP (1) EP1831924B1 (de)
JP (1) JP4288229B2 (de)
KR (1) KR101153637B1 (de)
CN (1) CN100499073C (de)
AT (1) ATE432532T1 (de)
DE (1) DE602005009026D1 (de)
TW (1) TW200633050A (de)
WO (1) WO2006068284A1 (de)

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JP4275096B2 (ja) * 2005-04-14 2009-06-10 パナソニック株式会社 半導体チップの製造方法
JP4840174B2 (ja) 2007-02-08 2011-12-21 パナソニック株式会社 半導体チップの製造方法
JP4840200B2 (ja) 2007-03-09 2011-12-21 パナソニック株式会社 半導体チップの製造方法
US7781310B2 (en) 2007-08-07 2010-08-24 Semiconductor Components Industries, Llc Semiconductor die singulation method
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US8012857B2 (en) * 2007-08-07 2011-09-06 Semiconductor Components Industries, Llc Semiconductor die singulation method
US8927348B2 (en) 2008-05-14 2015-01-06 Toyoda Gosei Co., Ltd. Method of manufacturing group-III nitride semiconductor light-emitting device, and group-III nitride semiconductor light-emitting device, and lamp
JP2010056353A (ja) * 2008-08-29 2010-03-11 Renesas Technology Corp 半導体装置の製造方法
US9299664B2 (en) * 2010-01-18 2016-03-29 Semiconductor Components Industries, Llc Method of forming an EM protected semiconductor die
US8384231B2 (en) 2010-01-18 2013-02-26 Semiconductor Components Industries, Llc Method of forming a semiconductor die
US9165833B2 (en) * 2010-01-18 2015-10-20 Semiconductor Components Industries, Llc Method of forming a semiconductor die
US20110175209A1 (en) * 2010-01-18 2011-07-21 Seddon Michael J Method of forming an em protected semiconductor die
JP5960389B2 (ja) * 2010-04-19 2016-08-02 東京エレクトロン株式会社 半導体集積回路チップを分離および搬送する方法
US8642448B2 (en) 2010-06-22 2014-02-04 Applied Materials, Inc. Wafer dicing using femtosecond-based laser and plasma etch
US9126285B2 (en) 2011-06-15 2015-09-08 Applied Materials, Inc. Laser and plasma etch wafer dicing using physically-removable mask
US8912077B2 (en) 2011-06-15 2014-12-16 Applied Materials, Inc. Hybrid laser and plasma etch wafer dicing using substrate carrier
US8703581B2 (en) 2011-06-15 2014-04-22 Applied Materials, Inc. Water soluble mask for substrate dicing by laser and plasma etch
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US8598016B2 (en) 2011-06-15 2013-12-03 Applied Materials, Inc. In-situ deposited mask layer for device singulation by laser scribing and plasma etch
US8759197B2 (en) 2011-06-15 2014-06-24 Applied Materials, Inc. Multi-step and asymmetrically shaped laser beam scribing
US8557683B2 (en) 2011-06-15 2013-10-15 Applied Materials, Inc. Multi-step and asymmetrically shaped laser beam scribing
US8507363B2 (en) 2011-06-15 2013-08-13 Applied Materials, Inc. Laser and plasma etch wafer dicing using water-soluble die attach film
US9129904B2 (en) 2011-06-15 2015-09-08 Applied Materials, Inc. Wafer dicing using pulse train laser with multiple-pulse bursts and plasma etch
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US8951819B2 (en) 2011-07-11 2015-02-10 Applied Materials, Inc. Wafer dicing using hybrid split-beam laser scribing process with plasma etch
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US20150147850A1 (en) * 2013-11-25 2015-05-28 Infineon Technologies Ag Methods for processing a semiconductor workpiece
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US20150255349A1 (en) 2014-03-07 2015-09-10 JAMES Matthew HOLDEN Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes
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Also Published As

Publication number Publication date
US20070264832A1 (en) 2007-11-15
US7678670B2 (en) 2010-03-16
JP4288229B2 (ja) 2009-07-01
KR20070089122A (ko) 2007-08-30
CN100499073C (zh) 2009-06-10
CN101040376A (zh) 2007-09-19
DE602005009026D1 (de) 2011-03-17
KR101153637B1 (ko) 2012-06-18
EP1831924A1 (de) 2007-09-12
TW200633050A (en) 2006-09-16
WO2006068284A1 (en) 2006-06-29
JP2006179768A (ja) 2006-07-06
EP1831924B1 (de) 2009-05-27

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