GB1406207A - Method of manufacturing a metallic lead frame for a semiconductor device - Google Patents

Method of manufacturing a metallic lead frame for a semiconductor device

Info

Publication number
GB1406207A
GB1406207A GB614574A GB614574A GB1406207A GB 1406207 A GB1406207 A GB 1406207A GB 614574 A GB614574 A GB 614574A GB 614574 A GB614574 A GB 614574A GB 1406207 A GB1406207 A GB 1406207A
Authority
GB
United Kingdom
Prior art keywords
leads
frame
strip
plate
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB614574A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of GB1406207A publication Critical patent/GB1406207A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
GB614574A 1973-02-16 1974-02-11 Method of manufacturing a metallic lead frame for a semiconductor device Expired GB1406207A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP48019670A JPS5144385B2 (enExample) 1973-02-16 1973-02-16

Publications (1)

Publication Number Publication Date
GB1406207A true GB1406207A (en) 1975-09-17

Family

ID=12005666

Family Applications (1)

Application Number Title Priority Date Filing Date
GB614574A Expired GB1406207A (en) 1973-02-16 1974-02-11 Method of manufacturing a metallic lead frame for a semiconductor device

Country Status (6)

Country Link
JP (1) JPS5144385B2 (enExample)
DE (1) DE2406086A1 (enExample)
FR (1) FR2218654A1 (enExample)
GB (1) GB1406207A (enExample)
IT (1) IT1008848B (enExample)
NL (1) NL7402112A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2236062A (en) * 1989-05-10 1991-03-27 Peter Moran Integrated circuit package

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519001Y2 (enExample) * 1975-08-15 1980-05-06
JPS5299069A (en) * 1976-02-16 1977-08-19 Hitachi Ltd Production of lead frame
JPS5322660U (enExample) * 1976-08-05 1978-02-25
DE3040676A1 (de) * 1980-10-29 1982-05-27 Philips Patentverwaltung Gmbh, 2000 Hamburg Verfahren zum herstellen von halbleiteranordnugen
JPS5832439A (ja) * 1982-03-01 1983-02-25 Nec Corp リ−ドフレ−ム
US5038453A (en) * 1988-07-22 1991-08-13 Rohm Co., Ltd. Method of manufacturing semiconductor devices, and leadframe and differential overlapping apparatus therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2236062A (en) * 1989-05-10 1991-03-27 Peter Moran Integrated circuit package
GB2236062B (en) * 1989-05-10 1993-05-26 Peter Moran Integrated circuit

Also Published As

Publication number Publication date
JPS5144385B2 (enExample) 1976-11-27
FR2218654A1 (enExample) 1974-09-13
DE2406086A1 (de) 1974-09-05
NL7402112A (enExample) 1974-08-20
JPS49107674A (enExample) 1974-10-12
IT1008848B (it) 1976-11-30

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
746 Register noted 'licences of right' (sect. 46/1977)
PCNP Patent ceased through non-payment of renewal fee