FR2218654A1 - - Google Patents

Info

Publication number
FR2218654A1
FR2218654A1 FR7405267A FR7405267A FR2218654A1 FR 2218654 A1 FR2218654 A1 FR 2218654A1 FR 7405267 A FR7405267 A FR 7405267A FR 7405267 A FR7405267 A FR 7405267A FR 2218654 A1 FR2218654 A1 FR 2218654A1
Authority
FR
France
Prior art keywords
leads
frame
strip
plate
feb
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7405267A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of FR2218654A1 publication Critical patent/FR2218654A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
FR7405267A 1973-02-16 1974-02-15 Withdrawn FR2218654A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP48019670A JPS5144385B2 (fr) 1973-02-16 1973-02-16

Publications (1)

Publication Number Publication Date
FR2218654A1 true FR2218654A1 (fr) 1974-09-13

Family

ID=12005666

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7405267A Withdrawn FR2218654A1 (fr) 1973-02-16 1974-02-15

Country Status (6)

Country Link
JP (1) JPS5144385B2 (fr)
DE (1) DE2406086A1 (fr)
FR (1) FR2218654A1 (fr)
GB (1) GB1406207A (fr)
IT (1) IT1008848B (fr)
NL (1) NL7402112A (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5519001Y2 (fr) * 1975-08-15 1980-05-06
JPS5299069A (en) * 1976-02-16 1977-08-19 Hitachi Ltd Production of lead frame
JPS5322660U (fr) * 1976-08-05 1978-02-25
DE3040676A1 (de) * 1980-10-29 1982-05-27 Philips Patentverwaltung Gmbh, 2000 Hamburg Verfahren zum herstellen von halbleiteranordnugen
JPS5832439A (ja) * 1982-03-01 1983-02-25 Nec Corp リ−ドフレ−ム
US5038453A (en) * 1988-07-22 1991-08-13 Rohm Co., Ltd. Method of manufacturing semiconductor devices, and leadframe and differential overlapping apparatus therefor
GB8910685D0 (en) * 1989-05-10 1989-06-28 Moran Peter Integrated circuit package

Also Published As

Publication number Publication date
IT1008848B (it) 1976-11-30
JPS5144385B2 (fr) 1976-11-27
GB1406207A (en) 1975-09-17
JPS49107674A (fr) 1974-10-12
NL7402112A (fr) 1974-08-20
DE2406086A1 (de) 1974-09-05

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Legal Events

Date Code Title Description
ST Notification of lapse