FR2468972A1 - Matrice de memoire permanente programmable ou non, a masse virtuelle - Google Patents

Matrice de memoire permanente programmable ou non, a masse virtuelle

Info

Publication number
FR2468972A1
FR2468972A1 FR8023091A FR8023091A FR2468972A1 FR 2468972 A1 FR2468972 A1 FR 2468972A1 FR 8023091 A FR8023091 A FR 8023091A FR 8023091 A FR8023091 A FR 8023091A FR 2468972 A1 FR2468972 A1 FR 2468972A1
Authority
FR
France
Prior art keywords
programmable
rows
column
permanent memory
memory matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR8023091A
Other languages
English (en)
Other versions
FR2468972B1 (fr
Inventor
Joseph H Neal
Paul A Reed
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of FR2468972A1 publication Critical patent/FR2468972A1/fr
Application granted granted Critical
Publication of FR2468972B1 publication Critical patent/FR2468972B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491—Virtual ground arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/126—Virtual ground arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885—Hot carrier injection from the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Logic Circuits (AREA)

Abstract

L'invention concerne une matrice de mémoire permanente programmable ou non, à masse virtuelle. La matrice de mémoire comporte des colonnes et des rangées de cellules constituées chacune par un transistor 10 à effet de champ à grille isolée, une ligne de colonne 18, 25 par colonne, mais aucune ligne spéciale de masse. La moitié des lignes de colonnes servent de lignes de sortie et l'autre moitié servent de lignes de masse. Un décodeur de colonnes 21 sélectionne une ligne de sortie et une ligne de masse à partir d'une entrée d'adresse. L'invention s'applique notamment à des mémoires de calculateur numérique.
FR8023091A 1979-10-29 1980-10-29 Matrice de memoire permanente programmable ou non, a masse virtuelle Granted FR2468972A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/088,789 US4281397A (en) 1979-10-29 1979-10-29 Virtual ground MOS EPROM or ROM matrix

Publications (2)

Publication Number Publication Date
FR2468972A1 true FR2468972A1 (fr) 1981-05-08
FR2468972B1 FR2468972B1 (fr) 1984-12-14

Family

ID=22213482

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8023091A Granted FR2468972A1 (fr) 1979-10-29 1980-10-29 Matrice de memoire permanente programmable ou non, a masse virtuelle

Country Status (4)

Country Link
US (1) US4281397A (fr)
JP (1) JPS56130975A (fr)
DE (1) DE3040757A1 (fr)
FR (1) FR2468972A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2468973A1 (fr) * 1979-11-01 1981-05-08 Texas Instruments Inc Circuit de detection differentielle pour une matrice de memoire a sortie monopolaire
EP0211632A2 (fr) 1985-08-02 1987-02-25 WaferScale Integration Inc. EPROM auto-aligné à grille scindée
FR2626401A1 (fr) * 1988-01-26 1989-07-28 Sgs Thomson Microelectronics Memoire eeprom a grille flottante avec transistor de selection de ligne de source
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same

Families Citing this family (113)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3153700C2 (fr) 1980-02-04 1993-01-28 Texas Instruments Inc., Dallas, Tex., Us
US4653026A (en) * 1981-08-12 1987-03-24 Hitachi, Ltd. Nonvolatile memory device or a single crystal silicon film
US4460981A (en) * 1981-12-24 1984-07-17 Intel Corporation Virtual ground memory
JPS59103687A (ja) * 1982-12-03 1984-06-15 京楽産業株式会社 電気的制御装置を備えたパチンコ機における不正行為防止装置
US4661926A (en) * 1984-11-20 1987-04-28 Thomson Components-Mostek Corp. Bit line gain circuit for read only memory
US4839705A (en) * 1987-12-16 1989-06-13 Texas Instruments Incorporated X-cell EEPROM array
JP2511485B2 (ja) * 1988-01-12 1996-06-26 沖電気工業株式会社 半導体記憶装置
KR930000963B1 (ko) * 1988-03-09 1993-02-11 가부시기가이샤 도오시바 불휘발성 메모리 회로장치
IT1217403B (it) * 1988-04-12 1990-03-22 Sgs Thomson Microelectronics Matrice di memoria a tovaglia con celle eprom sfalsate
US5262846A (en) * 1988-11-14 1993-11-16 Texas Instruments Incorporated Contact-free floating-gate memory array with silicided buried bitlines and with single-step-defined floating gates
JP2507576B2 (ja) * 1988-12-28 1996-06-12 株式会社東芝 半導体不揮発性メモリ
US5341329A (en) * 1988-12-28 1994-08-23 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device capable of preventing read error caused by overerase state and method therefor
DE68913190T2 (de) * 1989-03-31 1994-08-04 Philips Nv EPROM, der eine mehrfache Verwendung der Bitleitungskontakte ermöglicht.
US5023837A (en) * 1989-09-05 1991-06-11 Texas Instruments Incorporated Bitline segmentation in logic arrays
JP2565213B2 (ja) * 1989-10-27 1996-12-18 ソニー株式会社 読み出し専用メモリ装置
JPH03166762A (ja) * 1989-11-27 1991-07-18 Sony Corp 半導体メモリ
EP0432481A3 (en) * 1989-12-14 1992-04-29 Texas Instruments Incorporated Methods and apparatus for verifying the state of a plurality of electrically programmable memory cells
US5020026A (en) * 1989-12-14 1991-05-28 Texas Instruments Incorporated Method and apparatus for reading and programming electrically programmable memory cells
JP3032240B2 (ja) * 1990-05-22 2000-04-10 富士通株式会社 半導体記憶装置
US5204835A (en) * 1990-06-13 1993-04-20 Waferscale Integration Inc. Eprom virtual ground array
EP0461904A3 (en) * 1990-06-14 1992-09-09 Creative Integrated Systems, Inc. An improved semiconductor read-only vlsi memory
US5057446A (en) * 1990-08-06 1991-10-15 Texas Instruments Incorporated Method of making an EEPROM with improved capacitive coupling between control gate and floating gate
JP3002309B2 (ja) * 1990-11-13 2000-01-24 ウエハスケール インテグレーション， インコーポレイテッド 高速ｅｐｒｏｍアレイ
JPH04206965A (ja) * 1990-11-30 1992-07-28 Sony Corp 不揮発性半導体メモリ
US5132933A (en) * 1990-12-21 1992-07-21 Schreck John F Bias circuitry for nonvolatile memory array
JPH04311900A (ja) * 1991-04-10 1992-11-04 Sharp Corp 半導体読み出し専用メモリ
US5273926A (en) * 1991-06-27 1993-12-28 Texas Instruments Incorporated Method of making flash EEPROM or merged FAMOS cell without alignment sensitivity
JP3036910B2 (ja) * 1991-08-20 2000-04-24 沖電気工業株式会社 Ｃｍｏｓデコード回路
US5327378A (en) * 1992-03-04 1994-07-05 Waferscale Integration, Inc. Easily manufacturable compact EPROM
JP2845414B2 (ja) * 1992-09-18 1999-01-13 シャープ株式会社 半導体読み出し専用メモリ
EP1406269B1 (fr) * 1993-05-28 2009-07-15 Macronix International Co., Ltd. Configuration d'un circuit de préprogrammation et de programmation de mémoire morte programmable électroniquement (EPROM) flash rapide
JP3212421B2 (ja) * 1993-09-20 2001-09-25 富士通株式会社 不揮発性半導体記憶装置
JP2848223B2 (ja) * 1993-12-01 1999-01-20 日本電気株式会社 不揮発性半導体記憶装置の消去方法及び製造方法
US5517448A (en) * 1994-09-09 1996-05-14 United Microelectronics Corp. Bias circuit for virtual ground non-volatile memory array with bank selector
US6475846B1 (en) 1995-05-18 2002-11-05 Texas Instruments Incorporated Method of making floating-gate memory-cell array with digital logic transistors
KR970051170A (ko) * 1995-12-29 1997-07-29 김주용 메모리 셀 어레이 및 그를 이용한 프로그램 방법
KR100246782B1 (ko) * 1996-08-30 2000-03-15 김영환 메모리 셀 어레이
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US5959892A (en) * 1997-08-26 1999-09-28 Macronix International Co., Ltd. Apparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cells
US6633496B2 (en) 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Symmetric architecture for memory cells having widely spread metal bit lines
US6430077B1 (en) 1997-12-12 2002-08-06 Saifun Semiconductors Ltd. Method for regulating read voltage level at the drain of a cell in a symmetric array
US5963465A (en) * 1997-12-12 1999-10-05 Saifun Semiconductors, Ltd. Symmetric segmented memory array architecture
US6633499B1 (en) 1997-12-12 2003-10-14 Saifun Semiconductors Ltd. Method for reducing voltage drops in symmetric array architectures
US7157314B2 (en) * 1998-11-16 2007-01-02 Sandisk Corporation Vertically stacked field programmable nonvolatile memory and method of fabrication
US6385074B1 (en) 1998-11-16 2002-05-07 Matrix Semiconductor, Inc. Integrated circuit structure including three-dimensional memory array
US6351406B1 (en) 1998-11-16 2002-02-26 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6034882A (en) * 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6469935B2 (en) * 1999-08-05 2002-10-22 Halo Lsi Design & Device Technology, Inc. Array architecture nonvolatile memory and its operation methods
US6888750B2 (en) * 2000-04-28 2005-05-03 Matrix Semiconductor, Inc. Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication
US6631085B2 (en) 2000-04-28 2003-10-07 Matrix Semiconductor, Inc. Three-dimensional memory array incorporating serial chain diode stack
US8575719B2 (en) 2000-04-28 2013-11-05 Sandisk 3D Llc Silicon nitride antifuse for use in diode-antifuse memory arrays
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US6580124B1 (en) 2000-08-14 2003-06-17 Matrix Semiconductor Inc. Multigate semiconductor device with vertical channel current and method of fabrication
EP2988331B1 (fr) 2000-08-14 2019-01-09 SanDisk Technologies LLC Dispositif de mémoire à semiconducteur
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US6545898B1 (en) 2001-03-21 2003-04-08 Silicon Valley Bank Method and apparatus for writing memory arrays using external source of high programming voltage
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US6826107B2 (en) * 2002-08-01 2004-11-30 Saifun Semiconductors Ltd. High voltage insertion in flash memory cards
JP2004095048A (ja) * 2002-08-30 2004-03-25 Toshiba Corp 不揮発性半導体メモリ
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US4021781A (en) * 1974-11-19 1977-05-03 Texas Instruments Incorporated Virtual ground read-only-memory for electronic calculator or digital processor

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US4174541A (en) * 1976-12-01 1979-11-13 Raytheon Company Bipolar monolithic integrated circuit memory with standby power enable

Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
US4021781A (en) * 1974-11-19 1977-05-03 Texas Instruments Incorporated Virtual ground read-only-memory for electronic calculator or digital processor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2468973A1 (fr) * 1979-11-01 1981-05-08 Texas Instruments Inc Circuit de detection differentielle pour une matrice de memoire a sortie monopolaire
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same
EP0211632A2 (fr) 1985-08-02 1987-02-25 WaferScale Integration Inc. EPROM auto-aligné à grille scindée
EP0211632A3 (fr) * 1985-08-02 1988-09-14 WaferScale Integration Inc. EPROM auto-aligné à grille scindée
FR2626401A1 (fr) * 1988-01-26 1989-07-28 Sgs Thomson Microelectronics Memoire eeprom a grille flottante avec transistor de selection de ligne de source
EP0326465A1 (fr) * 1988-01-26 1989-08-02 STMicroelectronics S.A. Mémoire EEPROM à grille flottante avec transistor de sélection de ligne de source

Also Published As

Publication number Publication date
JPS56130975A (en) 1981-10-14
FR2468972B1 (fr) 1984-12-14
JPS6137797B2 (fr) 1986-08-26
DE3040757A1 (de) 1981-08-27
US4281397A (en) 1981-07-28

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