ES2165902T3 - Terminal para soldar y metodo de fabricarlo. - Google Patents

Terminal para soldar y metodo de fabricarlo.

Info

Publication number
ES2165902T3
ES2165902T3 ES95480062T ES95480062T ES2165902T3 ES 2165902 T3 ES2165902 T3 ES 2165902T3 ES 95480062 T ES95480062 T ES 95480062T ES 95480062 T ES95480062 T ES 95480062T ES 2165902 T3 ES2165902 T3 ES 2165902T3
Authority
ES
Spain
Prior art keywords
layer
solder
crcu
improved
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95480062T
Other languages
English (en)
Inventor
Nye Henri Atkinson Iii
Jeffrey Frederick Roeder
Ho-Ming Tong
Paul Anthony Totta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of ES2165902T3 publication Critical patent/ES2165902T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Multi-Conductor Connections (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

SE PRESENTA UN METODO Y UNA ESTRUCTURA PARA UN TERMINAL DE SOLDADURA MEJORADO. EL TERMINAL DE SOLDADURA MEJORADO ESTA HECHO DE UNA CAPA DE ADHESION METALICA DE FONDO, UNA CAPA INTERMEDIA DE CRCU SOBRE LA PARTE SUPERIOR DE LA CAPA DE ADHESION, UNA CAPA DE UNION DE SOLDADURA ENCIMA DE LA CAPA DE CRCU Y UNA CAPA SUPERIOR DE SOLDADURA. LA CAPA DE ADHESION PUEDE SER TANTO TIW O TIN. UN PROCESO PARA FABRICAR UN METAL DE TERMINAL MEJORADO CONSTA DE LA DEPOSICION DE UNA CAPA METALICA ADHESIVA, UNA CAPA DE CRCU SOBRE LA CAPA ADHESIVA Y UNA CAPA DE MATERIAL DE UNION DE SOLDADURA, SOBRE LA CUAL SE FORMA LA CAPA DE SOLDADURA EN REGIONES SELECTIVAS Y LAS CAPAS SUBYACENTES SON QUIMICAMENTE ATACADAS UTILIZANDO LAS REGIONES DE SOLDADURA COMO MASCARA.
ES95480062T 1994-06-28 1995-05-19 Terminal para soldar y metodo de fabricarlo. Expired - Lifetime ES2165902T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/267,339 US5503286A (en) 1994-06-28 1994-06-28 Electroplated solder terminal

Publications (1)

Publication Number Publication Date
ES2165902T3 true ES2165902T3 (es) 2002-04-01

Family

ID=23018386

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95480062T Expired - Lifetime ES2165902T3 (es) 1994-06-28 1995-05-19 Terminal para soldar y metodo de fabricarlo.

Country Status (11)

Country Link
US (2) US5503286A (es)
EP (1) EP0690504B1 (es)
JP (1) JP3210547B2 (es)
KR (1) KR100213152B1 (es)
CN (1) CN1126170C (es)
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Families Citing this family (104)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0761015B1 (en) * 1995-03-20 2000-01-05 Koninklijke Philips Electronics N.V. Semiconductor device of the type sealed in glass comprising a semiconductor body connected to slugs by means of a silver-aluminium bonding layer
DE69632969T2 (de) * 1995-03-20 2005-07-28 Unitive International Ltd. Verfahren zum Bilden von Loterhebungen und Loterhebungsstruktur
KR100327442B1 (ko) * 1995-07-14 2002-06-29 구본준, 론 위라하디락사 반도체소자의범프구조및형성방법
US5736456A (en) * 1996-03-07 1998-04-07 Micron Technology, Inc. Method of forming conductive bumps on die for flip chip applications
US5903058A (en) * 1996-07-17 1999-05-11 Micron Technology, Inc. Conductive bumps on die for flip chip application
KR100239695B1 (ko) 1996-09-11 2000-01-15 김영환 칩 사이즈 반도체 패키지 및 그 제조 방법
US5902686A (en) * 1996-11-21 1999-05-11 Mcnc Methods for forming an intermetallic region between a solder bump and an under bump metallurgy layer and related structures
US5759910A (en) * 1996-12-23 1998-06-02 Motorola, Inc. Process for fabricating a solder bump for a flip chip integrated circuit
US5956573A (en) * 1997-01-17 1999-09-21 International Business Machines Corporation Use of argon sputtering to modify surface properties by thin film deposition
US5904859A (en) * 1997-04-02 1999-05-18 Lucent Technologies Inc. Flip chip metallization
US5952716A (en) 1997-04-16 1999-09-14 International Business Machines Corporation Pin attach structure for an electronic package
US6117299A (en) * 1997-05-09 2000-09-12 Mcnc Methods of electroplating solder bumps of uniform height on integrated circuit substrates
KR100219806B1 (ko) * 1997-05-27 1999-09-01 윤종용 반도체장치의 플립 칩 실장형 솔더 범프의 제조방법, 이에 따라 제조되는 솔더범프 및 그 분석방법
US6082610A (en) * 1997-06-23 2000-07-04 Ford Motor Company Method of forming interconnections on electronic modules
DE19746893B4 (de) * 1997-10-23 2005-09-01 Siemens Ag Optoelektronisches Bauelement mit Wärmesenke im Sockelteil und Verfahren zur Herstellung
US6020636A (en) * 1997-10-24 2000-02-01 Eni Technologies, Inc. Kilowatt power transistor
US6015505A (en) * 1997-10-30 2000-01-18 International Business Machines Corporation Process improvements for titanium-tungsten etching in the presence of electroplated C4's
US6051879A (en) 1997-12-16 2000-04-18 Micron Technology, Inc. Electrical interconnection for attachment to a substrate
US6251528B1 (en) 1998-01-09 2001-06-26 International Business Machines Corporation Method to plate C4 to copper stud
US6642136B1 (en) * 2001-09-17 2003-11-04 Megic Corporation Method of making a low fabrication cost, high performance, high reliability chip scale package
JPH11340265A (ja) 1998-05-22 1999-12-10 Sony Corp 半導体装置及びその製造方法
JP2943805B1 (ja) * 1998-09-17 1999-08-30 日本電気株式会社 半導体装置及びその製造方法
MY139405A (en) * 1998-09-28 2009-09-30 Ibiden Co Ltd Printed circuit board and method for its production
SE512906C2 (sv) * 1998-10-02 2000-06-05 Ericsson Telefon Ab L M Förfarande vid lödning av ett halvledarchip samt RF-power transistor för genomförande därav
JP4564113B2 (ja) * 1998-11-30 2010-10-20 株式会社東芝 微粒子膜形成方法
US6248958B1 (en) 1998-11-30 2001-06-19 International Business Machines Corporation Resistivity control of CIC material
US6232212B1 (en) * 1999-02-23 2001-05-15 Lucent Technologies Flip chip bump bonding
US6133136A (en) * 1999-05-19 2000-10-17 International Business Machines Corporation Robust interconnect structure
US6332988B1 (en) 1999-06-02 2001-12-25 International Business Machines Corporation Rework process
US6544880B1 (en) * 1999-06-14 2003-04-08 Micron Technology, Inc. Method of improving copper interconnects of semiconductor devices for bonding
US6335495B1 (en) 1999-06-29 2002-01-01 International Business Machines Corporation Patterning a layered chrome-copper structure disposed on a dielectric substrate
FR2799578B1 (fr) * 1999-10-08 2003-07-18 St Microelectronics Sa Procede de realisation de connexions electriques sur un boitier semi-conducteur et boitier semi-conducteur
KR100311975B1 (ko) * 1999-12-16 2001-10-17 윤종용 반도체소자 및 그 제조방법
EP1990833A3 (en) * 2000-02-25 2010-09-29 Ibiden Co., Ltd. Multilayer printed circuit board and multilayer printed circuit board manufacturing method
US6293457B1 (en) * 2000-06-08 2001-09-25 International Business Machines Corporation Integrated method for etching of BLM titanium-tungsten alloys for CMOS devices with copper metallization
US6605534B1 (en) 2000-06-28 2003-08-12 International Business Machines Corporation Selective deposition of a conductive material
JP2002050647A (ja) * 2000-08-01 2002-02-15 Sharp Corp 半導体装置及びその製造方法
EP1321980A4 (en) 2000-09-25 2007-04-04 Ibiden Co Ltd SEMICONDUCTOR ELEMENT, METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT, MULTILAYER PRINTED CIRCUIT BOARD, AND METHOD FOR MANUFACTURING MULTILAYER PRINTED CIRCUIT BOARD
TW490821B (en) * 2000-11-16 2002-06-11 Orient Semiconductor Elect Ltd Application of wire bonding technique on manufacture of wafer bump and wafer level chip scale package
US6462426B1 (en) * 2000-12-14 2002-10-08 National Semiconductor Corporation Barrier pad for wafer level chip scale packages
US6539625B2 (en) 2001-01-11 2003-04-01 International Business Machines Corporation Chromium adhesion layer for copper vias in low-k technology
US6815324B2 (en) * 2001-02-15 2004-11-09 Megic Corporation Reliable metal bumps on top of I/O pads after removal of test probe marks
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
TWI313507B (en) 2002-10-25 2009-08-11 Megica Corporatio Method for assembling chips
US8158508B2 (en) * 2001-03-05 2012-04-17 Megica Corporation Structure and manufacturing method of a chip scale package
US6894399B2 (en) * 2001-04-30 2005-05-17 Intel Corporation Microelectronic device having signal distribution functionality on an interfacial layer thereof
US20020167804A1 (en) * 2001-05-14 2002-11-14 Intel Corporation Polymeric encapsulation material with fibrous filler for use in microelectronic circuit packaging
US7071024B2 (en) * 2001-05-21 2006-07-04 Intel Corporation Method for packaging a microelectronic device using on-die bond pad expansion
KR101022583B1 (ko) * 2001-05-24 2011-03-16 프라이즈 메탈즈, 인크. 방열재 및 땜납 프리폼
US6653741B2 (en) * 2001-05-24 2003-11-25 Fry's Metals, Inc. Thermal interface material and heat sink configuration
US7099293B2 (en) * 2002-05-01 2006-08-29 Stmicroelectronics, Inc. Buffer-less de-skewing for symbol combination in a CDMA demodulator
KR20030058627A (ko) * 2001-12-31 2003-07-07 주식회사 하이닉스반도체 반도체 소자의 제조 방법
TWI245402B (en) * 2002-01-07 2005-12-11 Megic Corp Rod soldering structure and manufacturing process thereof
US6715663B2 (en) * 2002-01-16 2004-04-06 Intel Corporation Wire-bond process flow for copper metal-six, structures achieved thereby, and testing method
KR100455678B1 (ko) * 2002-02-06 2004-11-06 마이크로스케일 주식회사 반도체 플립칩 패키지를 위한 솔더 범프 구조 및 그 제조방법
JP3829325B2 (ja) * 2002-02-07 2006-10-04 日本電気株式会社 半導体素子およびその製造方法並びに半導体装置の製造方法
US6622907B2 (en) * 2002-02-19 2003-09-23 International Business Machines Corporation Sacrificial seed layer process for forming C4 solder bumps
US20030219623A1 (en) * 2002-05-21 2003-11-27 Kao Cheng Heng Solder joints with low consumption rate of nickel layer
JP2003347742A (ja) * 2002-05-27 2003-12-05 Hitachi Ltd 多層回路基板とその製造法及び多層回路用基板並びに電子装置
US7547623B2 (en) * 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
TW558782B (en) * 2002-09-10 2003-10-21 Siliconware Precision Industries Co Ltd Fabrication method for strengthened flip-chip solder bump
US7098074B2 (en) * 2002-11-13 2006-08-29 Tessera, Inc. Microelectronic assemblies having low profile connections
JP4354187B2 (ja) 2003-01-21 2009-10-28 Ｔｄｋ株式会社 高ｑヘリカルコイルチップおよびその製造方法
US6951775B2 (en) * 2003-06-28 2005-10-04 International Business Machines Corporation Method for forming interconnects on thin wafers
US7470997B2 (en) * 2003-07-23 2008-12-30 Megica Corporation Wirebond pad for semiconductor chip or wafer
US7276801B2 (en) * 2003-09-22 2007-10-02 Intel Corporation Designs and methods for conductive bumps
US20050085062A1 (en) * 2003-10-15 2005-04-21 Semitool, Inc. Processes and tools for forming lead-free alloy solder precursors
US7144490B2 (en) * 2003-11-18 2006-12-05 International Business Machines Corporation Method for selective electroplating of semiconductor device I/O pads using a titanium-tungsten seed layer
US7261841B2 (en) * 2003-11-19 2007-08-28 E. I. Du Pont De Nemours And Company Thick film conductor case compositions for LTCC tape
KR100604334B1 (ko) * 2003-11-25 2006-08-08 (주)케이나인 플립칩 패키징 공정에서 접합력이 향상된 플립칩 접합 방법
US7541275B2 (en) * 2004-04-21 2009-06-02 Texas Instruments Incorporated Method for manufacturing an interconnect
US8067837B2 (en) 2004-09-20 2011-11-29 Megica Corporation Metallization structure over passivation layer for IC chip
US7731812B2 (en) * 2004-10-19 2010-06-08 E.I. Du Pont De Nemours And Company Thick film conductor case compositions for LTCC tape
US7087521B2 (en) * 2004-11-19 2006-08-08 Intel Corporation Forming an intermediate layer in interconnect joints and structures formed thereby
US8294279B2 (en) * 2005-01-25 2012-10-23 Megica Corporation Chip package with dam bar restricting flow of underfill
EP1732116B1 (en) * 2005-06-08 2017-02-01 Imec Methods for bonding and micro-electronic devices produced according to such methods
US7622309B2 (en) * 2005-06-28 2009-11-24 Freescale Semiconductor, Inc. Mechanical integrity evaluation of low-k devices with bump shear
DE102005035772A1 (de) * 2005-07-29 2007-02-01 Advanced Micro Devices, Inc., Sunnyvale Technik zum effizienten Strukturieren einer Höckerunterseitenmetallisierungsschicht unter Anwendung eines Trockenätzprozesses
TW200709359A (en) * 2005-08-31 2007-03-01 Advanced Semiconductor Eng Wafer structure
JP2007157504A (ja) * 2005-12-05 2007-06-21 Matsushita Electric Works Ltd マイクロリレー
EP2041841B1 (en) * 2006-07-19 2016-10-12 BorgWarner, Inc. Terminal weld tab having a wire squeeze limiter
US7485564B2 (en) * 2007-02-12 2009-02-03 International Business Machines Corporation Undercut-free BLM process for Pb-free and Pb-reduced C4
JP2008262953A (ja) * 2007-04-10 2008-10-30 Sharp Corp 半導体装置の製造方法
US8304909B2 (en) * 2007-12-19 2012-11-06 Intel Corporation IC solder reflow method and materials
US8169081B1 (en) 2007-12-27 2012-05-01 Volterra Semiconductor Corporation Conductive routings in integrated circuits using under bump metallization
CN101645413B (zh) * 2008-08-04 2012-01-25 中芯国际集成电路制造(上海)有限公司 金属连线的制作方法
US8410374B2 (en) * 2009-02-27 2013-04-02 Ibiden Co., Ltd. Printed wiring board
TW201113962A (en) * 2009-10-14 2011-04-16 Advanced Semiconductor Eng Chip having metal pillar structure
TWI445147B (zh) * 2009-10-14 2014-07-11 Advanced Semiconductor Eng 半導體元件
KR101225844B1 (ko) * 2010-07-13 2013-01-23 플란제 에스이 스퍼터링용 로터리 타겟의 접합 조성물 및 이를 이용한 로터리 타겟의 접합방법
TWI478303B (zh) 2010-09-27 2015-03-21 Advanced Semiconductor Eng 具有金屬柱之晶片及具有金屬柱之晶片之封裝結構
US8268716B2 (en) * 2010-09-30 2012-09-18 International Business Machines Corporation Creation of lead-free solder joint with intermetallics
TWI451546B (zh) 2010-10-29 2014-09-01 Advanced Semiconductor Eng 堆疊式封裝結構、其封裝結構及封裝結構之製造方法
JP5943065B2 (ja) * 2012-03-05 2016-06-29 株式会社村田製作所 接合方法、電子装置の製造方法、および電子部品
US8884443B2 (en) 2012-07-05 2014-11-11 Advanced Semiconductor Engineering, Inc. Substrate for semiconductor package and process for manufacturing
US8686568B2 (en) 2012-09-27 2014-04-01 Advanced Semiconductor Engineering, Inc. Semiconductor package substrates having layered circuit segments, and related methods
US20150262952A1 (en) * 2014-03-13 2015-09-17 Taiwan Semiconductor Manufacturing Co., Ltd Bump structure and method for forming the same
US20150345044A1 (en) * 2014-05-29 2015-12-03 National Chung Shan Institute Of Science And Technology Method of electroplating cobalt alloy to wiring surface
US9406629B2 (en) * 2014-10-15 2016-08-02 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor package structure and manufacturing method thereof
US9401328B2 (en) * 2014-12-22 2016-07-26 Stmicroelectronics S.R.L. Electric contact structure having a diffusion barrier for an electronic device and method for manufacturing the electric contact structure
CN107186373B (zh) * 2017-06-09 2019-05-10 华北水利水电大学 一种钛基多层膜钎料及其制备方法
US10797010B2 (en) * 2017-12-29 2020-10-06 Texas Instruments Incorporated Semiconductor package having a metal barrier
CN109396586B (zh) * 2018-12-13 2020-09-01 华北水利水电大学 一种环氧树脂器件与pcb印刷电路板基材的钎焊方法
US11228124B1 (en) * 2021-01-04 2022-01-18 International Business Machines Corporation Connecting a component to a substrate by adhesion to an oxidized solder surface

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1283970B (de) * 1966-03-19 1968-11-28 Siemens Ag Metallischer Kontakt an einem Halbleiterbauelement
US4290079A (en) * 1979-06-29 1981-09-15 International Business Machines Corporation Improved solder interconnection between a semiconductor device and a supporting substrate
US4434434A (en) * 1981-03-30 1984-02-28 International Business Machines Corporation Solder mound formation on substrates
JPS58141877A (ja) * 1982-02-19 1983-08-23 Sumitomo Electric Ind Ltd 溶接・鑞接用電極
JPS59117135A (ja) * 1982-12-24 1984-07-06 Hitachi Ltd 半導体装置の製造方法
DE3523808C3 (de) * 1984-07-03 1995-05-04 Hitachi Ltd Verfahren zum Löten von Teilen einer elektronischen Anordnung aus unterschiedlichen Werkstoffen und dessen Verwendung
US4954870A (en) * 1984-12-28 1990-09-04 Kabushiki Kaisha Toshiba Semiconductor device
JPS6373660A (ja) * 1986-09-17 1988-04-04 Fujitsu Ltd 半導体装置
US4840302A (en) * 1988-04-15 1989-06-20 International Business Machines Corporation Chromium-titanium alloy
KR940010510B1 (ko) * 1988-11-21 1994-10-24 세이꼬 엡슨 가부시끼가이샤 반도체 장치 제조 방법
ES2087968T3 (es) * 1990-03-23 1996-08-01 At & T Corp Interconexion de circuito integrado.
US5130275A (en) * 1990-07-02 1992-07-14 Digital Equipment Corp. Post fabrication processing of semiconductor chips
US5518674A (en) * 1991-06-28 1996-05-21 Texas Instruments Incorporated Method of forming thin film flexible interconnect for infrared detectors
US5162257A (en) * 1991-09-13 1992-11-10 Mcnc Solder bump fabrication method
JPH0629769A (ja) * 1992-07-09 1994-02-04 Murata Mfg Co Ltd チップ型電子部品
US5234149A (en) * 1992-08-28 1993-08-10 At&T Bell Laboratories Debondable metallic bonding method
US5268072A (en) * 1992-08-31 1993-12-07 International Business Machines Corporation Etching processes for avoiding edge stress in semiconductor chip solder bumps
US5264108A (en) * 1992-09-08 1993-11-23 The United States Of America As Represented By The United States Department Of Energy Laser patterning of laminated structures for electroplating

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DE69523991T2 (de) 2002-08-01
EP0690504B1 (en) 2001-11-21
BR9502623A (pt) 1997-08-26
US5503286A (en) 1996-04-02
US5629564A (en) 1997-05-13
EP0690504A1 (en) 1996-01-03
MY115355A (en) 2003-05-31
CN1126170C (zh) 2003-10-29
DE69523991D1 (de) 2002-01-03
TW344888B (en) 1998-11-11
KR100213152B1 (ko) 1999-08-02
JPH0818205A (ja) 1996-01-19
ATE209397T1 (de) 2001-12-15
JP3210547B2 (ja) 2001-09-17
CN1117655A (zh) 1996-02-28

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