EP2008287A1 - Elektrisches kaltleiter-bauelement und ein verfahren zu seiner herstellung - Google Patents
Elektrisches kaltleiter-bauelement und ein verfahren zu seiner herstellungInfo
- Publication number
- EP2008287A1 EP2008287A1 EP07722254A EP07722254A EP2008287A1 EP 2008287 A1 EP2008287 A1 EP 2008287A1 EP 07722254 A EP07722254 A EP 07722254A EP 07722254 A EP07722254 A EP 07722254A EP 2008287 A1 EP2008287 A1 EP 2008287A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- conductive layer
- component
- base body
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/02—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient
- H01C7/022—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient mainly consisting of non-metallic substances
- H01C7/023—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient mainly consisting of non-metallic substances containing oxides or oxidic compounds, e.g. ferrites
- H01C7/025—Perovskites, e.g. titanates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors
- H01C1/1406—Terminals or electrodes formed on resistive elements having positive temperature coefficient
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors
- H01C1/148—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49085—Thermally variable
Definitions
- An object to be solved is to specify a PTC thermistor component which has particularly low tolerance errors with regard to electrical properties. Another object to be solved is to provide a method for producing such a device.
- the component comprises a first and a second conductive layer, which are preferably arranged on an end face of the base body.
- the lateral surface of the Grundk ⁇ rpers is free of the first conductive layer.
- the second conductive layer forms a cap which covers the front side of the base body across edges, this layer lying partially on the lateral surface of the base body.
- a first and a second conductive layer are provided on each end face.
- the component preferably has a mirror symmetry.
- the first conductive layer is limited to the respective end face of the base body.
- the first conductive layer is not edged in contrast to the second conductive layer. across.
- the first layer contacts the main body.
- An end-side region of the second conductive layer is arranged on the first conductive layer, and a further region of the second conductive layer contacts the lateral surface of the main body.
- the first conductive layer is preferably a barrier-degrading barrier layer.
- the second conductive layer unlike the first conductive layer, is not provided as a barrier layer, but as a solder for z. B. provided with a circuit board, suitable for surface mounting electrical connection of the device.
- the component is therefore preferably surface mountable.
- the base body is preferably rectangular in cross-section, or its lateral surface has at least one flat side surface.
- Both first and second conductive layers may comprise multiple sublayers of different materials.
- the sub-layer of the respective conductive layer facing the base body is preferably an adhesion-promoting layer.
- the first conductive layer may, for. B. have a chromium-containing sub-layer as an adhesive layer on which preferably a nickel-containing sublayer is applied.
- the second conductive layer may, for. B. have a silver-containing lower sub-layer, a nickel-containing middle sub-layer and a solderable, especially tin-containing upper sub-layer.
- the lower silver layer can be activated with a Pd activator before nickel plating.
- the lowermost sub-layer of the first conductive layer is preferably sputtered on and possibly galvanically reinforced.
- Further partial layers of the first conductive layer may, for. B. be applied chemically or electroplated. However, the partial layers of the first conductive layer can also be produced in each case by screen printing with subsequent burn-in.
- the second conductive layer preferably comprises at least one applied by a dipping process layer, for. B. on a silver-containing layer. This is preferably the lowest layer of the second conductive layer. As mentioned above, at least one further layer can be applied to the lowermost layer, which can also be produced chemically or galvanically in a dipping process by screen printing.
- a barrier layer (first conductive layer) is applied by sputtering;
- each individual component region comprising a base body on whose two end faces the barrier layer is arranged;
- Conductive caps (second conductive layer) arranged on the front side are produced on the separated component regions in a dipping process.
- the large-area substrate is preferably produced by pressing a ceramic-containing material with predetermined properties and subsequent sintering.
- 50% of the ceramic material ML151 and 50% of the ceramic material ML251 dry or wet homogenized the mixture is preferably pressed on a uniaxial dry press and sintered.
- the substrate is lapped in a variant, preferably after sintering, preferably to a prescribed thickness, kept in a solution containing sulfuric acid for a given period of time to improve the adhesion of the sputtered layer, and then washed.
- the main surfaces of the substrate are metallized.
- a preferably chromium-containing layer is first applied by sputtering.
- the Cr layer may, for. B. be produced in a thickness of 0.1 to 1.0 microns.
- a nickel-containing layer z. B. preferably applied with a thickness of 0.1 to 1.0 microns by sputtering and galvanically or chemically reinforced to a thickness that preferably exceeds 1 micron and z. B. 2 to 10 microns.
- the substrate is preferably sawn to form isolated device regions.
- edges between end faces and lateral surface of the body are rounded or at least flattened by scrubbing with the addition of water and SiC powder.
- the conductive caps are applied in a dipping process, wherein each base body is immersed in a metal-containing, preferably silver-containing paste, which after dipping preferably under air atmosphere and at a temperature of temperature of max. 900 0 C is baked.
- the metal layer produced in this case is preferably z. B. scrubbed and / or polished with the addition of water and SiC powder.
- the conductive caps are activated after polishing preferably in the order given with Pd activator, nickel-plated and tin-plated.
- the nickel plating is preferably carried out chemically, d. H. de-energized.
- the tinning is preferably carried out galvanically. In principle, the Pd activation can be dispensed with if the nickel plating is carried out galvanically.
- the barrier layer is already produced before and not after the separation of the component regions in a dipping process has the advantage that the geometric dimensions determining the electrical properties of the component and thus also the manufacturing tolerances with regard to the electrical properties of the components can be kept low , although the conductive caps are directly on the body, but they have essentially no effect on the electrical resistance of the device.
- FIG. 1 shows a large-area substrate with the applied barrier layer and not yet isolated component areas;
- FIG. 2 shows an isolated component area;
- FIG. 3 shows the separated component region with rounded edges before the dipping process
- FIG. 4 shows the separated component region after the dipping process
- Figure 5 is a completed device.
- FIG. 1 shows a large-area substrate 10 with a barrier layer 21, 22 applied on its two main surfaces.
- the substrate 10 has not yet separated component regions 101 - 106. With dashed lines sawing lines, ie boundaries between different component areas are indicated.
- Each component region comprises a main body 1 and barrier layers 21, 22 arranged on its end faces.
- the large-area substrate 10 is formed as a rod which is sawn perpendicular to its longitudinal direction.
- the large-area substrate 10 can also have component regions arranged as a two-dimensional matrix. It is sawed in transverse directions.
- FIGS. 2 and 3 a separated component region 101 is shown before or after scrubbing.
- the immersed component region with silver-containing caps 31, 32 which cover its frontal ends across edges, is shown in FIG.
- FIG. 5 shows a finished component after the tinning of caps 31, 32.
- the barrier layer 21, 22 has a lower partial layer 211, 221 (eg Cr layer) applied by sputtering and possibly galvanically reinforced, if appropriate a chemically applied middle partial layer (eg Ni layer not shown in the figure) ) and an electrodeposited upper sub-layer 212, 222 (eg, Ni layer).
- a tin-containing releasable layer 41, 42 is arranged on the silver-containing cap 31, 32 produced by dipping.
- the downwardly facing portions of the caps 31, 32 form surface mounting suitable contacts of the device (SMD contacts).
- the specified component and method is not limited to the embodiments shown in the figures and in particular the illustrated shape of the base body and number and material of partial layers. All layers applied by sputtering can also be produced in a dipping process or a screen printing process followed by firing.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Thermistors And Varistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102006017796A DE102006017796A1 (de) | 2006-04-18 | 2006-04-18 | Elektrisches Kaltleiter-Bauelement |
| PCT/DE2007/000696 WO2007118472A1 (de) | 2006-04-18 | 2007-04-18 | Elektrisches kaltleiter-bauelement und ein verfahren zu seiner herstellung |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP2008287A1 true EP2008287A1 (de) | 2008-12-31 |
| EP2008287B1 EP2008287B1 (de) | 2017-02-15 |
Family
ID=38249244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP07722254.5A Active EP2008287B1 (de) | 2006-04-18 | 2007-04-18 | Elektrisches kaltleiter-bauelement und ein verfahren zu seiner herstellung |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8154379B2 (de) |
| EP (1) | EP2008287B1 (de) |
| JP (2) | JP5038395B2 (de) |
| DE (1) | DE102006017796A1 (de) |
| WO (1) | WO2007118472A1 (de) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101099356B1 (ko) * | 2008-01-29 | 2011-12-26 | 가부시키가이샤 무라타 세이사쿠쇼 | 칩형 반도체 세라믹 전자부품 |
| JP2013153129A (ja) | 2011-09-29 | 2013-08-08 | Rohm Co Ltd | チップ抵抗器および抵抗回路網を有する電子機器 |
| JP6134507B2 (ja) | 2011-12-28 | 2017-05-24 | ローム株式会社 | チップ抵抗器およびその製造方法 |
| JP6107062B2 (ja) * | 2012-11-06 | 2017-04-05 | Tdk株式会社 | チップサーミスタ |
| JP6227877B2 (ja) * | 2013-02-26 | 2017-11-08 | ローム株式会社 | チップ抵抗器、およびチップ抵抗器の製造方法 |
| JP7268393B2 (ja) * | 2019-02-22 | 2023-05-08 | 三菱マテリアル株式会社 | サーミスタの製造方法 |
| DE102019122611A1 (de) * | 2019-08-22 | 2021-02-25 | Endress+Hauser SE+Co. KG | SMD-lötbares Bauelement und Verfahren zum Herstellen eines SMD-lötbaren Bauelements |
| CN116195011A (zh) * | 2020-09-17 | 2023-05-30 | 株式会社村田制作所 | 芯片型陶瓷半导体电子元件 |
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| DE1415409A1 (de) * | 1958-04-30 | 1970-12-17 | Siemens Ag | Widerstand mit positivem Temperaturkoeffizenten des Widerstandswertes |
| DE1415406B1 (de) * | 1958-04-30 | 1970-08-20 | Siemens Ag | Keramischer Widerstand mit hohem positiven Temperaturkoeffizienten seines Gesamtwiderstandswertes |
| JPH01128501A (ja) * | 1987-11-13 | 1989-05-22 | Murata Mfg Co Ltd | チップ型正特性サーミスタ |
| DE3930000A1 (de) * | 1988-09-08 | 1990-03-15 | Murata Manufacturing Co | Varistor in schichtbauweise |
| GB2242066B (en) * | 1990-03-16 | 1994-04-27 | Ecco Ltd | Varistor structures |
| JPH04118901A (ja) * | 1990-09-10 | 1992-04-20 | Komatsu Ltd | 正特性サーミスタおよびその製造方法 |
| DE4029681A1 (de) | 1990-09-19 | 1992-04-02 | Siemens Ag | Verfahren zum herstellen von oberflaechenmontierbaren keramischen bauelementen in melf-technologie |
| JP3169181B2 (ja) * | 1990-11-22 | 2001-05-21 | 株式会社村田製作所 | チップ型正特性サーミスタ |
| JP2833242B2 (ja) * | 1991-03-12 | 1998-12-09 | 株式会社村田製作所 | Ntcサーミスタ素子 |
| GB9113888D0 (en) * | 1991-06-27 | 1991-08-14 | Raychem Sa Nv | Circuit protection devices |
| JPH0529115A (ja) * | 1991-07-23 | 1993-02-05 | Murata Mfg Co Ltd | チツプ型半導体部品の製造方法 |
| JP3031025B2 (ja) * | 1991-12-22 | 2000-04-10 | 株式会社村田製作所 | チップ型セラミック電子部品の製造方法 |
| JPH05308003A (ja) | 1992-03-30 | 1993-11-19 | Taiyo Yuden Co Ltd | チップ型サーミスタの製造方法 |
| JPH05343201A (ja) * | 1992-06-11 | 1993-12-24 | Tdk Corp | Ptcサーミスタ |
| KR100255906B1 (ko) * | 1994-10-19 | 2000-05-01 | 모리시타 요이찌 | 전자부품과 그 제조방법 |
| JPH07254534A (ja) * | 1995-01-11 | 1995-10-03 | Murata Mfg Co Ltd | 電子部品の外部電極形成方法 |
| JPH08250307A (ja) * | 1995-03-15 | 1996-09-27 | Murata Mfg Co Ltd | チップサーミスタ |
| JPH0955303A (ja) * | 1995-08-11 | 1997-02-25 | Mitsui Mining & Smelting Co Ltd | チップ型薄膜サーミスタ素子およびその製造方法 |
| JPH09129417A (ja) | 1995-10-30 | 1997-05-16 | Murata Mfg Co Ltd | バリスタの外部電極形成方法 |
| JPH09205005A (ja) * | 1996-01-24 | 1997-08-05 | Matsushita Electric Ind Co Ltd | 電子部品とその製造方法 |
| JP3039403B2 (ja) * | 1996-12-06 | 2000-05-08 | 株式会社村田製作所 | 積層セラミックコンデンサ |
| JP3028069B2 (ja) * | 1997-03-10 | 2000-04-04 | 株式会社村田製作所 | サーミスタの製造方法 |
| DE19736855A1 (de) | 1997-08-23 | 1999-02-25 | Philips Patentverwaltung | Schaltungsanordnung mit einem SMD-Bauelement, insbesondere Temperatursensor und Verfahren zur Herstellung eines Temperatursensors |
| US6358436B2 (en) * | 1999-07-23 | 2002-03-19 | Ngk Insulators, Ltd. | Inorganic-metal composite body exhibiting reliable PTC behavior |
| JP2001052901A (ja) * | 1999-08-05 | 2001-02-23 | Tdk Corp | チップ型有機質正特性サーミスタとその製造方法 |
| DE19946199B4 (de) * | 1999-09-27 | 2005-01-20 | Epcos Ag | Elektrisches Bauelement mit variablem elektrischem Widerstand |
| JP2001126946A (ja) * | 1999-10-28 | 2001-05-11 | Murata Mfg Co Ltd | 積層セラミック電子部品及びその製造方法 |
| JP2001143905A (ja) * | 1999-11-17 | 2001-05-25 | Murata Mfg Co Ltd | チップ型サーミスタの製造方法 |
| DE10018377C1 (de) | 2000-04-13 | 2001-12-06 | Epcos Ag | Keramisches Vielschichtbauelement und Verfahren zur Herstellung |
| DE10026260B4 (de) * | 2000-05-26 | 2004-03-25 | Epcos Ag | Keramisches Bauelement und dessen Verwendung sowie Verfahren zur galvanischen Erzeugung von Kontaktschichten auf einem keramischen Grundkörper |
| KR100476158B1 (ko) * | 2000-12-11 | 2005-03-15 | 주식회사 아모텍 | 글래스 코팅막을 갖는 세라믹 칩 소자 및 그의 제조방법 |
| JP2002203703A (ja) * | 2000-12-27 | 2002-07-19 | Murata Mfg Co Ltd | チップ型正特性サーミスタ |
| JP2003297603A (ja) * | 2001-06-01 | 2003-10-17 | Murata Mfg Co Ltd | チップ型サーミスタおよびチップ型サーミスタの実装構造 |
| JP2003151805A (ja) * | 2001-11-15 | 2003-05-23 | Murata Mfg Co Ltd | チップ型電子部品およびその製造方法 |
| JP3744439B2 (ja) | 2002-02-27 | 2006-02-08 | 株式会社村田製作所 | 導電性ペーストおよび積層セラミック電子部品 |
| JP4200765B2 (ja) * | 2002-02-28 | 2008-12-24 | 株式会社村田製作所 | 積層型セラミック電子部品の製造方法 |
| DE10218154A1 (de) * | 2002-04-23 | 2003-11-13 | Epcos Ag | PTC-Bauelement und Verfahren zu dessen Herstellung |
| JP4211510B2 (ja) * | 2002-08-13 | 2009-01-21 | 株式会社村田製作所 | 積層型ptcサーミスタの製造方法 |
-
2006
- 2006-04-18 DE DE102006017796A patent/DE102006017796A1/de not_active Ceased
-
2007
- 2007-04-18 WO PCT/DE2007/000696 patent/WO2007118472A1/de not_active Ceased
- 2007-04-18 EP EP07722254.5A patent/EP2008287B1/de active Active
- 2007-04-18 US US12/297,579 patent/US8154379B2/en active Active
- 2007-04-18 JP JP2009505718A patent/JP5038395B2/ja active Active
-
2012
- 2012-07-05 JP JP2012151930A patent/JP5603904B2/ja active Active
Non-Patent Citations (1)
| Title |
|---|
| See references of WO2007118472A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| US20090167481A1 (en) | 2009-07-02 |
| JP2009534814A (ja) | 2009-09-24 |
| JP5038395B2 (ja) | 2012-10-03 |
| US8154379B2 (en) | 2012-04-10 |
| EP2008287B1 (de) | 2017-02-15 |
| JP2012212931A (ja) | 2012-11-01 |
| JP5603904B2 (ja) | 2014-10-08 |
| WO2007118472A1 (de) | 2007-10-25 |
| DE102006017796A1 (de) | 2007-10-25 |
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