EP1800352A1 - Verfahren zur kontakttrennung elektrisch leitfähiger schichten auf rückkontaktierten solarzellen und entsprechende solarzelle - Google Patents
Verfahren zur kontakttrennung elektrisch leitfähiger schichten auf rückkontaktierten solarzellen und entsprechende solarzelleInfo
- Publication number
- EP1800352A1 EP1800352A1 EP05799115A EP05799115A EP1800352A1 EP 1800352 A1 EP1800352 A1 EP 1800352A1 EP 05799115 A EP05799115 A EP 05799115A EP 05799115 A EP05799115 A EP 05799115A EP 1800352 A1 EP1800352 A1 EP 1800352A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- solar cell
- substrate
- contact
- barrier layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000926 separation method Methods 0.000 title claims abstract description 12
- 238000000034 method Methods 0.000 title claims description 36
- 239000000758 substrate Substances 0.000 claims abstract description 74
- 238000005530 etching Methods 0.000 claims abstract description 54
- 230000004888 barrier function Effects 0.000 claims abstract description 43
- 239000004065 semiconductor Substances 0.000 claims abstract description 23
- 238000004519 manufacturing process Methods 0.000 claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims description 58
- 239000002184 metal Substances 0.000 claims description 58
- 230000007704 transition Effects 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 10
- 230000000873 masking effect Effects 0.000 claims description 9
- 238000001465 metallisation Methods 0.000 claims description 9
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 238000007740 vapor deposition Methods 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 239000004922 lacquer Substances 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 238000000608 laser ablation Methods 0.000 abstract description 7
- 239000004020 conductor Substances 0.000 abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 6
- 235000012431 wafers Nutrition 0.000 description 6
- 230000008901 benefit Effects 0.000 description 4
- 239000002800 charge carrier Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022433—Particular geometry of the grid contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
- H01L31/022458—Electrode arrangements specially adapted for back-contact solar cells for emitter wrap-through [EWT] type solar cells, e.g. interdigitated emitter-base back-contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
Definitions
- the present invention relates to a solar cell in which both an emitter contact and a base contact are arranged on a back side of a semiconductor substrate, and a method for the production thereof. More particularly, the invention relates to a method of electrically isolating base and emitter contacts disposed on the back side of a solar cell.
- Solar cells serve to convert light into electrical energy.
- charge carrier pairs generated in a semiconductor substrate are separated by a pn junction and then fed via the emitter contact and the base contact to a circuit having a load.
- the emitter contact is usually arranged on the front side, ie the side facing the light source, of the semiconductor substrate.
- solar cells have also been proposed, for example in JP 5-75149 A, DE 41 43 083 and DE 101 42 481, in which both the base contact and the emitter contact are arranged on the substrate rear side. This avoids shading of the front side by the contacts, which leads to increased efficiency as well as improved aesthetics of the solar cell, on the other hand, such solar cells are easier to connect in series, since the back of a cell with the front of a be ⁇ adjacent cell must be electrically connected.
- a solar cell without front-side metallization has several advantages: the solar cell front side is not shaded by any contact, so that the incident radiation energy can generate charge carriers in the semiconductor substrate without restriction. In addition, these cells are easier to interconnect modules and they have a high aesthetics.
- back-contact solar cells have several disadvantages. Their manufacturing processes are usually expensive. In some methods, multiple masking steps, multiple etch steps, and / or multiple vapor deposition steps are necessary to form the base contact electrically separate from the emitter contact at the backside of the semiconductor substrate. Furthermore, conventional back-contact solar cells often suffer from local short circuits, caused for example by by inversion layers between the base and the emitter region or by lack of electrical insulation between the emitter and the base contact, which leads to a reduced efficiency of the solar cell.
- a solar cell without front-side metallization is known, for example, from R.M. Swanson "Point Contact Silicon Solar Cells” Electric Power Research Institute Rep. AP-2859, May 1983.
- This cell concept has been continuously developed (R.A. Sinton “Bilevel contact solar cells", US Patent 5,053,083, 1991).
- a simplified version of this point-contact solar cell is being manufactured by SunPower Corporation in a pilot line (KR Mclnthosh, MJ Cudzinovic, D-D Smith, WP, Mulligan, and RM Swanson, "The Choice of Silicon Wafer for the Production of Low Temperature”). cost rear-contact solar cells 3rd 3rd Conference of PV energy convercion Osaka 2003 in press).
- Patent DE 41 43 083 describes a solar cell without front side metallization in which adjusting mask steps are not absolutely necessary. However, the efficiency of this cell is low, since the inversion layer connects both contact systems, which causes a low parallel resistance and thus a small filling factor.
- a particular difficulty with solar cells contacted on the back side is the complicated manufacture of the rear side contacts, in which electrical short circuits must be avoided at all costs.
- this invention solves the problem of producing the two back contact systems, ie base contact and emitter contact, and their 100 perfect electrical isolation in a simple manner and describes a solar cell which is easy to manufacture by this.
- a method for producing a solar cell 105 comprises the following steps: providing a semiconductor substrate having a substrate front side and a substrate rear side; Forming an emitter region and a base region at the substrate backside, respectively; Forming an electrically insulating layer on the back of the substrate at least in transition regions above a region boundary, at which the emitter region adjoins the base region; Depositing a metal layer at least on partial regions of the substrate rear side; Depositing an etching barrier layer at least on partial regions of the metal layer, the etching barrier layer being substantially resistant to an etching etching the metal layer; locally removing the etch barrier layer at least in subregions of the 115 transition regions; Etching the metal layer, wherein the metal layer in the partial areas in which the ⁇ tzbarr Schltechnik is removed locally, is substantially removed.
- a silicon wafer can be used as the semiconductor substrate.
- the method 120 is particularly suitable for the production of back-contact solar cells in which an emitter is formed on both the front and the back of the solar cell (for example, so-called EWT solar cells (emitter wrap-through)). Due to the short distances to a pn junction separating the charge carrier pairs, in such solar cells, silicon wafers 125 of inferior quality, for example made of multicrystalline silicon or Cz sili- cium, having a minority carrier diffusion length shorter than the thickness of the wafer can be used.
- this method is advantageous because, in contrast to some of the conventional methods mentioned in the introduction, it does not require structuring of the substrate back, but instead can be used on substrates with a flat back side.
- the emitter region to be subsequently formed and the base region of the solar cell have different n-type or p-type dopants.
- the definition of the two regions may e.g. be done by the fact that the
- HO sis Championship is protected locally from diffusion with a masking layer or the whole area is diffused and the resulting emitter is subsequently etched away locally or removed by laser ablation.
- the two regions can be nested in one another like a comb ("interdigitated"). As a result, it is achieved that charge carrier pairs generated in the semiconductor substrate are only short
- an electrically insulating layer is formed on the back of the substrate.
- “Above” is to be understood as being adjacent to the surface of the substrate rear side.
- transitional regions is meant those regions which are lateral to the region boundary, i. parallel to the substrate surface, are adjacent.
- the electrically insulating layer may be a dielectric, which surface-passivates both the underlying substrate surface and in particular the exposed pn junction, as well as avoids short circuits between the emitter region and the base region, caused by a metal layer lying over later.
- the insulating layer may preferably be formed with bilicon oxide and unipolar nitride. This can be formed by any known method. For example, an oxide can be grown thermally on the silicon surface or a nitride can be deposited by means of a CVD process 170. It is important that the layer as well as possible elek ⁇ electrically isolated. Any holes (“pin holes”) can affect the insulating properties of the layer. Therefore, care should be taken that the layer is as dense as possible. Thermally grown oxides are usually denser than deposited nitrides and may therefore be preferred.
- the insulating layer is to be formed only in the transition areas, but intervening areas are not to be covered by the layer for purposes of electrical contact, the insulating layer may be selectively applied through a mask, focusing on the correct position respect the area boundary.
- the insulating layer may be formed over the entire surface of the substrate back and then locally, e.g. linear or punctiform, for example by laser ablation or local etching.
- a masking layer which was formed before the emitter region diffuses on the base region in order to protect it against diffusion, remains on the substrate backside and subsequently serves as an insulating layer. Since emitter dopants also diffuse laterally under the masking layer during diffusion, this subsequently covers the range boundary between the emitter and base regions.
- a metal layer is deposited, preferably on the entire substrate back side.
- a masking, crizspiels ⁇ example by photolithography, individual areas of the substrate back is not necessary. Possibly remain portions of the substrate back, for example, serve to hold the substrate during the deposition, free of the metal layer.
- aluminum is preferably used for the metal layer. 200
- an etching barrier layer is deposited thereon, at least once again in partial regions.
- the ⁇ tzbarr Schl thus covers the metal layer at least partially.
- both the metal layer and the overlying etching barrier layer cover substantially the entire back of the substrate.
- the etch barrier layer is essentially resistant to etching etching the metal layer.
- an etching for example a liquid etching solution or a reactive gas, which strongly attacks the metal layer 2io, does not etch or etch the etching barrier layer.
- the etch rate of the etch should be much higher with respect to the metal layer, for example by a factor of ten, relative to the etch barrier layer.
- solderable metals such as silver or copper may be used for the etch barrier layer.
- solderable is here understood to mean that a conventional cable or a contact strip which can serve, for example, to interconnect the solar cells with one another can be soldered to the etching barrier layer.
- solderable is simple, inexpensive soldering without the use of 220 special notes or special tools, as they are necessary, for example, for soldering aluminum or titanium or compounds of such metals can be used.
- the ⁇ tzbarr Schlieren harsh should be solderable by means of conventional silver solder and conventional soldering iron.
- dielectrics such as silicon oxide (for example SiCM or silicon nitride (for example SiaN) for the etching barrier layer, which may possibly be removed locally in later production steps for contacting the underlying metal layer.
- the deposition of the metal layer and / or the etching barrier layer preferably takes place by vapor deposition or sputtering. Both layers can be deposited during a single vacuum step. Subsequently, the atz barrier layer is locally removed at least in subregions above 235 of the transition regions. In other words, the etch barrier layer is at least partially removed where the substrate rear side is covered by the electrically insulating layer at the region boundary of exposed pn junctions.
- the removal of the etching barrier layer may preferably take place without masking. That is, no overlaid or photolithographically generated mask is used to locally open the etch barrier layer.
- the etching barrier layer can be locally removed by laser ablation by means of a laser.
- the ⁇ tzbarr Schlieren harsh is locally evaporated by a high-energy laser or chipped, so that the underlying metal layer is exposed.
- the etching barrier layer can be removed by means of an etching solution which is applied locally, for example by a dispenser, similar to an inkjet printer.
- the ⁇ tzbarr Schlieren harsh can also be removed mechanically, for example by scribing or sawing, locally.
- the substrate rear side with the metal layer thereon and the etching barrier layer covering it are exposed to an etching.
- the metal layer is not or hardly attacked by the etching.
- the etch can directly attack the metal layer.
- the metal layer underlying the etch barrier layer is etched away in these subregions. There is a separation trench, which extends to the underlying electrically insulating layer. As a result, the metal layer in the base region is no longer
- a dielectric acting as an insulating layer can surface-passivate wide areas of the back surface of the substrate and only needs to be locally for the contacting of the emitter
- the base contacts may be driven through the dielectric into the base region by a LFC (Laser Fired Contacts) process.
- the dielectric can be selectively opened locally in the base region before the metal deposition.
- the local removal of the etching barrier layer in turn only has to lie somewhere in the region of the underlying transition regions and take place so that after the etching step the entire base contact is completely electrically separated from the emitter contact. This means that the separating trench insulating the emitter contact from the base contact always remains in regions
- the separation trench may be formed meander-shaped. It can also be designed in such a way that elongated metallization finger regions insulated from one another by the separating trench extend from one side edge of the solar cell to an opposite one
- a solar cell comprising: a semiconductor substrate having a substrate front side
- a substrate backside a base region of a first doping type the substrate backside and an emitter region of a second doping type at the substrate backside; a dielectric layer in transition regions above a region boundary at which the base region is adjacent to the emitter region; a base contact, the base area at least in some areas electrically
- the base contact and the emitter contact each having a metal layer contacting the semiconductor substrate, wherein the metal layer of the base contact of the metal layer of the emitter contact above the dielectric layer by a separation gap laterally is spaced,
- the solar cell can in particular have the features as can be formed by the above-described method according to the invention.
- the solar cell is designed such that the metal layer of the base contact and the metal layer of the emitter contact are arranged substantially equidistant from the substrate front side. In other words, this means that the two contacts are applied to a flat substrate back. The contacts are therefore through
- a further thin metal layer which serves as an etching barrier layer during the position of the solar cell, is located above the metal layer forming the contacts.
- This layer is preferably coated with a solderable material, e.g. Silver or copper manufactured ⁇ det. With your help, the contacts, the metal layer can be formed from difficult solderable aluminum, simply soldered and the So ⁇ larzellen be interconnected with each other.
- FIG. 1 shows schematically a sectional view of a solar cell according to the invention according to a first embodiment.
- FIGS. 2A to 2C schematically illustrate process steps of a method sequence according to the invention.
- FIG. 3 schematically shows a sectional view of a solar cell 345 according to the invention according to a second embodiment with separating trenches, which are offset laterally with respect to a region boundary.
- FIG. 4 schematically shows a view of a solar cell according to the invention according to a third embodiment, in which the separation trench is formed meander-shaped 350.
- FIG. 5 shows schematically a view of a solar cell according to the invention according to a fourth embodiment with tapered contact fingers.
- FIGS. 2A to 2C illustrate the method steps for the separation of back contact areas on the basis of the area A, which is framed by a dashed line in FIG.
- Locally n-doped emitter regions 3 are diffused at the rear side of a p-doped silicon wafer serving as semiconductor substrate 2.
- a diffusion barrier for example silicon nitride
- the substrate is then subjected to phos phordiffusion.
- an electrically insulating layer 7 in the form of a thermally grown silicon oxide layer and a silicon nitride layer deposited thereon by CVD is applied over the entire substrate back side. This layer 7 is formed locally by laser ablation in the area of the later emitter contact, ie over the emitter region 3.
- an aluminum layer serving as metal layer 5 is then vapor-deposited, which directly contacts the substrate rear side in the emitter region 3, while it is arranged above the insulating layer 7 in the base region 4 and in a transition region adjacent to the region boundary 6.
- an aluminum layer serving as metal layer 5 is then vapor-deposited, which directly contacts the substrate rear side in the emitter region 3, while it is arranged above the insulating layer 7 in the base region 4 and in a transition region adjacent to the region boundary 6.
- the metal layer 5 serves as an etching barrier layer 8 serving silver auf ⁇ .
- Fig. 2A There is now a layer sequence, as shown in Fig. 2A.
- the etching barrier layer 8 is locally opened by means of a laser.
- the opened area 9 can have a meandering course. In this way, nested contact fingers are generated.
- the interleaved contact fingers are tapered. This has the advantage that in regions of the contact fingers in which a high current flows, the cross section of the contact fingers is also large and thus resistance losses are reduced.
- the semiconductor substrate with the layer sequence applied thereto is subjected to an etching.
- an etchant can be a solution, for example, based on HCl, or also a reactive gas can be used. These atoms do not or hardly adhere to the atoms. However, in the opened regions 9, the etch directly impacts 405 on the metal layer 5 and etches it away. The result is a separating trench 10 which extends down to the insulating layer 7 and which separates the metal layer 5a of the emitter contact from the metal layer 5b of the base contact.
- FIG. 3 shows an embodiment in which the separation trench 10 is arranged in a region laterally spaced from the region boundary 6. Furthermore, a lacquer layer 12 is applied locally via the insulating layer 7, which increases the resistance between the metal layer 5 and the underlying substrate. This can be advantageous in particular if the insulating layer 7 has microscopic holes which can cause local short circuits 415.
- a solar cell (1) with a semiconductor substrate (2) is proposed, the electrical contacting of which on the semiconductor substrate
- the semiconductor substrate back has locally doped areas (3).
- the adjacent regions (4) have a different doping from the region (3).
- the two regions (3, 4) are first coated with an electrically conductive material (5) over the entire surface. So that the conductive material (5) does not short-circuit the solar cell, the two regions (3, 4) are
- the separation of the electrically conductive layer (5) is carried out by application of an etch-stable layer (8) over the entire area, which is subsequently masking-free and selective, e.g. by laser ablation locally below the insulating layer
- the contacts have a double layer of a vapor-deposited metal layer and an etching barrier.
- the contact separation preferably takes place by means of contactless local laser ablation or local etching away of the etching barrier layer and subsequent local etching away of the metal layer. It therefore occurs during the metallization no mechanical stress on the solar cell.
- M eta I contacts can be separated on a flat substrate back; no surface structuring of the silicon wafer is necessary;
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004050269A DE102004050269A1 (de) | 2004-10-14 | 2004-10-14 | Verfahren zur Kontakttrennung elektrisch leitfähiger Schichten auf rückkontaktierten Solarzellen und Solarzelle |
PCT/EP2005/011046 WO2006042698A1 (de) | 2004-10-14 | 2005-10-13 | Verfahren zur kontakttrennung elektrisch leitfähiger schichten auf rückkontaktierten solarzellen und entsprechende solarzelle |
Publications (1)
Publication Number | Publication Date |
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EP1800352A1 true EP1800352A1 (de) | 2007-06-27 |
Family
ID=35462341
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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EP05799115A Withdrawn EP1800352A1 (de) | 2004-10-14 | 2005-10-13 | Verfahren zur kontakttrennung elektrisch leitfähiger schichten auf rückkontaktierten solarzellen und entsprechende solarzelle |
Country Status (10)
Country | Link |
---|---|
US (3) | US20080035198A1 (de) |
EP (1) | EP1800352A1 (de) |
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2004
- 2004-10-14 DE DE102004050269A patent/DE102004050269A1/de not_active Ceased
-
2005
- 2005-10-13 CA CA2583760A patent/CA2583760C/en not_active Expired - Fee Related
- 2005-10-13 CN CNB2005800350042A patent/CN100524832C/zh active Active
- 2005-10-13 JP JP2007536099A patent/JP5459957B2/ja active Active
- 2005-10-13 US US11/665,318 patent/US20080035198A1/en not_active Abandoned
- 2005-10-13 WO PCT/EP2005/011046 patent/WO2006042698A1/de active Application Filing
- 2005-10-13 AU AU2005296716A patent/AU2005296716B2/en not_active Ceased
- 2005-10-13 KR KR1020077010796A patent/KR101192548B1/ko active IP Right Grant
- 2005-10-13 MX MX2007004533A patent/MX2007004533A/es active IP Right Grant
- 2005-10-13 EP EP05799115A patent/EP1800352A1/de not_active Withdrawn
-
2010
- 2010-09-14 US US12/881,714 patent/US20110053312A1/en not_active Abandoned
-
2013
- 2013-11-26 US US14/090,739 patent/US20140087515A1/en not_active Abandoned
Non-Patent Citations (1)
Title |
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See references of WO2006042698A1 * |
Also Published As
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AU2005296716B2 (en) | 2012-02-02 |
CA2583760A1 (en) | 2006-04-27 |
JP2008517451A (ja) | 2008-05-22 |
KR101192548B1 (ko) | 2012-10-17 |
US20110053312A1 (en) | 2011-03-03 |
CA2583760C (en) | 2013-08-06 |
MX2007004533A (es) | 2008-01-14 |
US20080035198A1 (en) | 2008-02-14 |
AU2005296716A1 (en) | 2006-04-27 |
CN100524832C (zh) | 2009-08-05 |
CN101048875A (zh) | 2007-10-03 |
KR20070092953A (ko) | 2007-09-14 |
JP5459957B2 (ja) | 2014-04-02 |
WO2006042698A1 (de) | 2006-04-27 |
DE102004050269A1 (de) | 2006-04-20 |
US20140087515A1 (en) | 2014-03-27 |
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