DE69739522D1 - SiC-HALBLEITERANORDNUNG MIT EINEM PN-UEBERGANG DER EINEN RAND ZUR ABSORPTION DER SPANNUNG ENTHAELT - Google Patents
SiC-HALBLEITERANORDNUNG MIT EINEM PN-UEBERGANG DER EINEN RAND ZUR ABSORPTION DER SPANNUNG ENTHAELTInfo
- Publication number
- DE69739522D1 DE69739522D1 DE69739522T DE69739522T DE69739522D1 DE 69739522 D1 DE69739522 D1 DE 69739522D1 DE 69739522 T DE69739522 T DE 69739522T DE 69739522 T DE69739522 T DE 69739522T DE 69739522 D1 DE69739522 D1 DE 69739522D1
- Authority
- DE
- Germany
- Prior art keywords
- absorption
- transition
- voltage
- edge
- sic semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000010521 absorption reaction Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 230000007704 transition Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
- H01L21/0465—Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/931—Silicon carbide semiconductor
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/683,059 US6002159A (en) | 1996-07-16 | 1996-07-16 | SiC semiconductor device comprising a pn junction with a voltage absorbing edge |
PCT/SE1997/001157 WO1998002924A2 (en) | 1996-07-16 | 1997-06-27 | SiC SEMICONDUCTOR DEVICE COMPRISING A pn JUNCTION WITH A VOLTAGE ABSORBING EDGE |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69739522D1 true DE69739522D1 (de) | 2009-09-17 |
Family
ID=24742400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69739522T Expired - Lifetime DE69739522D1 (de) | 1996-07-16 | 1997-06-27 | SiC-HALBLEITERANORDNUNG MIT EINEM PN-UEBERGANG DER EINEN RAND ZUR ABSORPTION DER SPANNUNG ENTHAELT |
Country Status (5)
Country | Link |
---|---|
US (2) | US6002159A (de) |
EP (1) | EP0912999B1 (de) |
JP (3) | JP2000516767A (de) |
DE (1) | DE69739522D1 (de) |
WO (1) | WO1998002924A2 (de) |
Families Citing this family (95)
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US6096663A (en) * | 1998-07-20 | 2000-08-01 | Philips Electronics North America Corporation | Method of forming a laterally-varying charge profile in silicon carbide substrate |
US6246076B1 (en) | 1998-08-28 | 2001-06-12 | Cree, Inc. | Layered dielectric on silicon carbide semiconductor structures |
US6972436B2 (en) | 1998-08-28 | 2005-12-06 | Cree, Inc. | High voltage, high temperature capacitor and interconnection structures |
US6642558B1 (en) * | 2000-03-20 | 2003-11-04 | Koninklijke Philips Electronics N.V. | Method and apparatus of terminating a high voltage solid state device |
US7067176B2 (en) | 2000-10-03 | 2006-06-27 | Cree, Inc. | Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment |
US6956238B2 (en) | 2000-10-03 | 2005-10-18 | Cree, Inc. | Silicon carbide power metal-oxide semiconductor field effect transistors having a shorting channel and methods of fabricating silicon carbide metal-oxide semiconductor field effect transistors having a shorting channel |
US6767843B2 (en) | 2000-10-03 | 2004-07-27 | Cree, Inc. | Method of N2O growth of an oxide layer on a silicon carbide layer |
US6573128B1 (en) | 2000-11-28 | 2003-06-03 | Cree, Inc. | Epitaxial edge termination for silicon carbide Schottky devices and methods of fabricating silicon carbide devices incorporating same |
SE0004377D0 (sv) * | 2000-11-29 | 2000-11-29 | Abb Research Ltd | A semiconductor device and a method for production thereof |
US6528373B2 (en) | 2001-02-12 | 2003-03-04 | Cree, Inc. | Layered dielectric on silicon carbide semiconductor structures |
US7022378B2 (en) | 2002-08-30 | 2006-04-04 | Cree, Inc. | Nitrogen passivation of interface states in SiO2/SiC structures |
US9515135B2 (en) * | 2003-01-15 | 2016-12-06 | Cree, Inc. | Edge termination structures for silicon carbide devices |
US7026650B2 (en) | 2003-01-15 | 2006-04-11 | Cree, Inc. | Multiple floating guard ring edge termination for silicon carbide devices |
US20050259368A1 (en) * | 2003-11-12 | 2005-11-24 | Ted Letavic | Method and apparatus of terminating a high voltage solid state device |
US20060006394A1 (en) * | 2004-05-28 | 2006-01-12 | Caracal, Inc. | Silicon carbide Schottky diodes and fabrication method |
US7118970B2 (en) | 2004-06-22 | 2006-10-10 | Cree, Inc. | Methods of fabricating silicon carbide devices with hybrid well regions |
US7394158B2 (en) * | 2004-10-21 | 2008-07-01 | Siliconix Technology C.V. | Solderable top metal for SiC device |
US7812441B2 (en) | 2004-10-21 | 2010-10-12 | Siliconix Technology C.V. | Schottky diode with improved surge capability |
JP4186919B2 (ja) * | 2004-12-07 | 2008-11-26 | 三菱電機株式会社 | 半導体装置 |
US7834376B2 (en) * | 2005-03-04 | 2010-11-16 | Siliconix Technology C. V. | Power semiconductor switch |
US9419092B2 (en) * | 2005-03-04 | 2016-08-16 | Vishay-Siliconix | Termination for SiC trench devices |
US8901699B2 (en) | 2005-05-11 | 2014-12-02 | Cree, Inc. | Silicon carbide junction barrier Schottky diodes with suppressed minority carrier injection |
US7528040B2 (en) | 2005-05-24 | 2009-05-05 | Cree, Inc. | Methods of fabricating silicon carbide devices having smooth channels |
JP5034225B2 (ja) * | 2005-09-05 | 2012-09-26 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
DE112006002377B4 (de) * | 2005-09-08 | 2014-04-24 | Mitsubishi Denki K.K. | Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung |
US7727904B2 (en) | 2005-09-16 | 2010-06-01 | Cree, Inc. | Methods of forming SiC MOSFETs with high inversion layer mobility |
US8368165B2 (en) * | 2005-10-20 | 2013-02-05 | Siliconix Technology C. V. | Silicon carbide Schottky diode |
CN101506989B (zh) * | 2006-07-31 | 2014-02-19 | 威世-硅尼克斯 | 用于SiC肖特基二极管的钼势垒金属及制造工艺 |
US8432012B2 (en) | 2006-08-01 | 2013-04-30 | Cree, Inc. | Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same |
US7728402B2 (en) | 2006-08-01 | 2010-06-01 | Cree, Inc. | Semiconductor devices including schottky diodes with controlled breakdown |
KR101529331B1 (ko) | 2006-08-17 | 2015-06-16 | 크리 인코포레이티드 | 고전력 절연 게이트 바이폴라 트랜지스터 |
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JP6384944B2 (ja) | 2012-05-31 | 2018-09-05 | 富士電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
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JP5800095B2 (ja) * | 2012-09-21 | 2015-10-28 | 三菱電機株式会社 | 半導体装置 |
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WO2014184839A1 (ja) * | 2013-05-13 | 2014-11-20 | 株式会社日立製作所 | 炭化珪素半導体装置 |
EP2997596B1 (de) | 2013-05-14 | 2021-03-17 | Cree, Inc. | Hochleistungsfähiges leistungsmodul |
US10347489B2 (en) | 2013-07-02 | 2019-07-09 | General Electric Company | Semiconductor devices and methods of manufacture |
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JP6200864B2 (ja) * | 2014-07-24 | 2017-09-20 | 株式会社日立製作所 | 高耐圧半導体装置 |
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JP2018156987A (ja) | 2017-03-15 | 2018-10-04 | 住友電気工業株式会社 | 半導体装置 |
JP6407354B2 (ja) * | 2017-05-22 | 2018-10-17 | 三菱電機株式会社 | 電力用半導体装置 |
CN108447896B (zh) * | 2018-04-08 | 2021-02-05 | 深圳市太赫兹科技创新研究院 | 碳化硅功率器件终端结构的制造方法 |
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DE3219888A1 (de) * | 1982-05-27 | 1983-12-01 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Planares halbleiterbauelement und verfahren zur herstellung |
GB2131603B (en) * | 1982-12-03 | 1985-12-18 | Philips Electronic Associated | Semiconductor devices |
NL8401983A (nl) * | 1984-06-22 | 1986-01-16 | Philips Nv | Halfgeleiderinrichting met verhoogde doorslagspanning. |
IT1214805B (it) * | 1984-08-21 | 1990-01-18 | Ates Componenti Elettron | Spositivi a semiconduttore con giunprocesso per la fabbricazione di dizioni planari a concentrazione di carica variabile e ad altissima tensione di breakdown |
EP0176778B1 (de) | 1984-09-28 | 1991-01-16 | Siemens Aktiengesellschaft | Verfahren zum Herstellen eines pn-Übergangs mit hoher Durchbruchsspannung |
US4648174A (en) * | 1985-02-05 | 1987-03-10 | General Electric Company | Method of making high breakdown voltage semiconductor device |
FR2581252B1 (fr) * | 1985-04-26 | 1988-06-10 | Radiotechnique Compelec | Composant semiconducteur du type planar a structure d'anneaux de garde, famille de tels composants et procede de realisation |
US4947218A (en) * | 1987-11-03 | 1990-08-07 | North Carolina State University | P-N junction diodes in silicon carbide |
US4927772A (en) * | 1989-05-30 | 1990-05-22 | General Electric Company | Method of making high breakdown voltage semiconductor device |
JPH05326552A (ja) * | 1992-03-19 | 1993-12-10 | Oki Electric Ind Co Ltd | 半導体素子およびその製造方法 |
US5233215A (en) * | 1992-06-08 | 1993-08-03 | North Carolina State University At Raleigh | Silicon carbide power MOSFET with floating field ring and floating field plate |
JP3192809B2 (ja) * | 1993-03-12 | 2001-07-30 | 株式会社東芝 | 高耐圧炭化珪素ショットキ−・ダイオ−ド |
WO1995032524A1 (en) * | 1994-05-24 | 1995-11-30 | Abb Research Ltd. | Semiconductor device in silicon carbide with passivated surface |
TW286435B (de) * | 1994-07-27 | 1996-09-21 | Siemens Ag | |
US5967795A (en) * | 1995-08-30 | 1999-10-19 | Asea Brown Boveri Ab | SiC semiconductor device comprising a pn junction with a voltage absorbing edge |
-
1996
- 1996-07-16 US US08/683,059 patent/US6002159A/en not_active Expired - Lifetime
-
1997
- 1997-06-27 JP JP10505911A patent/JP2000516767A/ja active Pending
- 1997-06-27 EP EP97933082A patent/EP0912999B1/de not_active Expired - Lifetime
- 1997-06-27 DE DE69739522T patent/DE69739522D1/de not_active Expired - Lifetime
- 1997-06-27 WO PCT/SE1997/001157 patent/WO1998002924A2/en active Application Filing
- 1997-10-23 US US08/956,959 patent/US6040237A/en not_active Expired - Lifetime
-
2008
- 2008-10-10 JP JP2008263877A patent/JP5527958B2/ja not_active Expired - Lifetime
-
2013
- 2013-01-04 JP JP2013000103A patent/JP2013062545A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0912999B1 (de) | 2009-08-05 |
JP5527958B2 (ja) | 2014-06-25 |
WO1998002924A3 (en) | 1998-03-05 |
WO1998002924A2 (en) | 1998-01-22 |
US6002159A (en) | 1999-12-14 |
JP2000516767A (ja) | 2000-12-12 |
JP2009044177A (ja) | 2009-02-26 |
US6040237A (en) | 2000-03-21 |
EP0912999A2 (de) | 1999-05-06 |
JP2013062545A (ja) | 2013-04-04 |
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