DE69629061D1 - Harztragender metallfolie für mehrschichtige leiterplatte, verfahren zu deren herstellung, mehrschichtige leiterplatte, und elektronische vorrichtung - Google Patents

Harztragender metallfolie für mehrschichtige leiterplatte, verfahren zu deren herstellung, mehrschichtige leiterplatte, und elektronische vorrichtung

Info

Publication number
DE69629061D1
DE69629061D1 DE69629061T DE69629061T DE69629061D1 DE 69629061 D1 DE69629061 D1 DE 69629061D1 DE 69629061 T DE69629061 T DE 69629061T DE 69629061 T DE69629061 T DE 69629061T DE 69629061 D1 DE69629061 D1 DE 69629061D1
Authority
DE
Germany
Prior art keywords
circuit board
layer circuit
resin
electronic device
production
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69629061T
Other languages
English (en)
Other versions
DE69629061T2 (de
Inventor
Teruo Katayose
Shozo Kinoshita
Takeshi Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Kasei Chemicals Corp
Asahi Chemical Industry Co Ltd
Original Assignee
Asahi Kasei Chemicals Corp
Asahi Chemical Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Kasei Chemicals Corp, Asahi Chemical Industry Co Ltd filed Critical Asahi Kasei Chemicals Corp
Publication of DE69629061D1 publication Critical patent/DE69629061D1/de
Application granted granted Critical
Publication of DE69629061T2 publication Critical patent/DE69629061T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/032Organic insulating material consisting of one material
    • H05K1/0326Organic insulating material consisting of one material containing O
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/024Dielectric details, e.g. changing the dielectric material around a transmission line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0358Resin coated copper [RCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/249921Web or sheet containing structurally defined element or component
    • Y10T428/249994Composite having a component wherein a constituent is liquid or is contained within preformed walls [e.g., impregnant-filled, previously void containing component, etc.]
    • Y10T428/249999Differentially filled foam, filled plural layers, or filled layer with coat of filling material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/25Web or sheet containing structurally defined element or component and including a second component containing structurally defined particles
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/31504Composite [nonstructural laminate]
    • Y10T428/31511Of epoxy ether
    • Y10T428/31529Next to metal
DE1996629061 1996-06-07 1996-12-19 Harztragender metallfolie für mehrschichtige leiterplatte, verfahren zu deren herstellung, mehrschichtige leiterplatte, und elektronische vorrichtung Expired - Lifetime DE69629061T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP14534896 1996-06-07
JP14534896 1996-06-07
JP17957996 1996-07-09
JP17957996 1996-07-09
PCT/JP1996/003712 WO1997047165A1 (fr) 1996-06-07 1996-12-19 Feuille de metal porteuse de resine pour tableau de cablage multicouche, procede de fabrication de cette feuille, tableau de cablage multicouche, et dispositif electronique

Publications (2)

Publication Number Publication Date
DE69629061D1 true DE69629061D1 (de) 2003-08-14
DE69629061T2 DE69629061T2 (de) 2004-05-13

Family

ID=26476502

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1996629061 Expired - Lifetime DE69629061T2 (de) 1996-06-07 1996-12-19 Harztragender metallfolie für mehrschichtige leiterplatte, verfahren zu deren herstellung, mehrschichtige leiterplatte, und elektronische vorrichtung

Country Status (6)

Country Link
US (1) US6254971B1 (de)
EP (1) EP0957664B1 (de)
JP (1) JP3676379B2 (de)
KR (1) KR100280911B1 (de)
DE (1) DE69629061T2 (de)
WO (1) WO1997047165A1 (de)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6898180B2 (en) 1999-06-08 2005-05-24 Nokia Corporation Connection admission in a communications network
CN1378769A (zh) 1999-08-12 2002-11-06 Ibiden股份有限公司 多层印刷电路板、阻焊配方、多层印刷电路板的制造方法和半导体器件
US6871396B2 (en) * 2000-02-09 2005-03-29 Matsushita Electric Industrial Co., Ltd. Transfer material for wiring substrate
JP2002033581A (ja) * 2000-07-13 2002-01-31 Mitsui Mining & Smelting Co Ltd 銅張積層板の製造方法
US6596968B2 (en) * 2000-08-28 2003-07-22 Ube Industries, Ltd. Method of producing through-hole in aromatic polyimide film
JP2002093853A (ja) * 2000-09-07 2002-03-29 Internatl Business Mach Corp <Ibm> プリント配線板およびフリップチップ実装方法
JP4529262B2 (ja) * 2000-09-14 2010-08-25 ソニー株式会社 高周波モジュール装置及びその製造方法
JP2002111222A (ja) * 2000-10-02 2002-04-12 Matsushita Electric Ind Co Ltd 多層基板
KR100618511B1 (ko) 2002-03-05 2006-08-31 히다치 가세고교 가부시끼가이샤 수지 부착 금속박, 금속 피복 적층판, 그를 이용한 프린트배선판 및 그의 제조 방법
US6734259B1 (en) * 2002-10-24 2004-05-11 International Business Machines Corporation Resin composition with a polymerizing agent and method of manufacturing prepreg and other laminate structures therefrom
US7023084B2 (en) * 2003-03-18 2006-04-04 Sumitomo Metal (Smi) Electronics Devices Inc. Plastic packaging with high heat dissipation and method for the same
US8414962B2 (en) 2005-10-28 2013-04-09 The Penn State Research Foundation Microcontact printed thin film capacitors
US8440916B2 (en) * 2007-06-28 2013-05-14 Intel Corporation Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method
US8877565B2 (en) * 2007-06-28 2014-11-04 Intel Corporation Method of forming a multilayer substrate core structure using sequential microvia laser drilling and substrate core structure formed according to the method
WO2009037332A1 (en) * 2007-09-20 2009-03-26 Agfa-Gevaert N.V. Security laminates with interlaminated transparent embossed polymer hologram
EP2042576A1 (de) * 2007-09-20 2009-04-01 Agfa-Gevaert Sicherheitslaminat mit eingeprägtem transparentem Zwischenschicht-Polymerhologramm
TWI478810B (zh) * 2008-03-25 2015-04-01 Ajinomoto Kk An insulating resin sheet, and a multilayer printed circuit board using the same
WO2009121793A2 (en) * 2008-04-01 2009-10-08 Agfa Gevaert Lamination process for producung security laminates
CN102123873A (zh) * 2008-04-01 2011-07-13 爱克发-格法特公司 具有安全特征的安全层压材料
CN105150656A (zh) * 2008-04-01 2015-12-16 爱克发-格法特公司 具有可通过触摸察觉的安全性特征的安全性层压板
JP2009283739A (ja) * 2008-05-23 2009-12-03 Shinko Electric Ind Co Ltd 配線基板および配線基板の製造方法
EP2181858A1 (de) * 2008-11-04 2010-05-05 Agfa-Gevaert N.V. Sicherheitsdokument und Herstellungsverfahren
EP2199100A1 (de) * 2008-12-22 2010-06-23 Agfa-Gevaert N.V. Sicherheitslaminate für Sicherheitsdokumente
JP5444944B2 (ja) * 2009-08-25 2014-03-19 Tdk株式会社 活物質及び活物質の製造方法
US20110052473A1 (en) * 2009-08-25 2011-03-03 Tdk Corporation Method of manufacturing active material
JP5482062B2 (ja) * 2009-09-29 2014-04-23 Tdk株式会社 薄膜コンデンサ及び薄膜コンデンサの製造方法
EP2332738B1 (de) 2009-12-10 2012-07-04 Agfa-Gevaert Sicherheitsdokument mit Sicherheitsmerkmal auf Rand
EP2335937B1 (de) 2009-12-18 2013-02-20 Agfa-Gevaert Lasermarkierbarer Sicherheitsfilm
PL2335938T3 (pl) 2009-12-18 2013-07-31 Agfa Gevaert Znakowalna laserowo folia zabezpieczająca
KR101328235B1 (ko) 2010-05-07 2013-11-14 제이엑스 닛코 닛세키 킨조쿠 가부시키가이샤 인쇄 회로용 동박
CN102371649A (zh) * 2010-08-19 2012-03-14 鸿富锦精密工业(深圳)有限公司 金属与树脂的复合体的制造方法
US20120090883A1 (en) * 2010-10-13 2012-04-19 Qualcomm Incorporated Method and Apparatus for Improving Substrate Warpage
JP5870627B2 (ja) * 2011-11-01 2016-03-01 富士通株式会社 半導体装置の製造方法
US9076600B2 (en) 2012-03-27 2015-07-07 Tdk Corporation Thin film capacitor
US9030800B2 (en) 2012-03-29 2015-05-12 Tdk Corporation Thin film capacitor
CN104663007B (zh) 2012-09-20 2017-10-24 株式会社可乐丽 电路基板及其制造方法
JP5874697B2 (ja) * 2013-08-28 2016-03-02 株式会社デンソー 多層プリント基板およびその製造方法
US11437304B2 (en) * 2014-11-06 2022-09-06 Semiconductor Components Industries, Llc Substrate structures and methods of manufacture
JP6520085B2 (ja) 2014-12-05 2019-05-29 Tdk株式会社 薄膜キャパシタ
WO2016201076A1 (en) 2015-06-09 2016-12-15 Rogers Corporation Circuit materials and articles formed therefrom
KR102411998B1 (ko) * 2015-06-25 2022-06-22 삼성전기주식회사 회로 기판 및 그 제조방법
CN109641985B (zh) * 2016-08-22 2022-04-22 株式会社大阪曹达 光固化性树脂组合物、油墨及涂料
US10993333B2 (en) * 2017-07-15 2021-04-27 Sanmina Corporation Methods of manufacturing ultra thin dielectric printed circuit boards with thin laminates
JP2020083931A (ja) * 2018-11-16 2020-06-04 利昌工業株式会社 樹脂組成物、プリプレグ、および、積層板

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6025296A (ja) * 1983-07-22 1985-02-08 三菱瓦斯化学株式会社 多層板の製法
JPS6142872U (ja) * 1984-08-22 1986-03-19 カシオ計算機株式会社 フレキシブル回路基板
JPH0686534B2 (ja) * 1985-10-31 1994-11-02 三井東圧化学株式会社 フレキシブルプリント回路基板の製造法
JPH0653261B2 (ja) * 1988-12-13 1994-07-20 日本ジーイープラスチックス株式会社 耐低温衝撃性を有する塗装された樹脂成形品及びそのような樹脂成形品の塗装方法
JPH0716089B2 (ja) * 1989-08-25 1995-02-22 松下電工株式会社 電気用積層板
JPH03166935A (ja) * 1989-11-25 1991-07-18 Matsushita Electric Works Ltd 積層板
JPH03165596A (ja) * 1989-11-25 1991-07-17 Matsushita Electric Works Ltd 多層積層板
JPH0491940A (ja) * 1990-08-07 1992-03-25 Dainippon Printing Co Ltd 金属箔積層フィルム
CN1036402C (zh) * 1991-01-11 1997-11-12 旭化成工业株式会社 可固化的聚苯氧树脂组合物及由它制成的薄膜
JP3166935B2 (ja) 1992-03-26 2001-05-14 株式会社リコー 復号処理方法および装置
JPH06232553A (ja) * 1993-01-29 1994-08-19 Hitachi Chem Co Ltd 積層用片面フレキシブル銅張板
JP3516473B2 (ja) * 1993-12-28 2004-04-05 新日鐵化学株式会社 プリント基板用耐熱性接着剤フィルム
JP3165596B2 (ja) 1994-08-31 2001-05-14 シャープ株式会社 空気調和機の人体検知方法
WO1996037915A1 (en) * 1995-05-26 1996-11-28 Sheldahl, Inc. Adherent film with low thermal impedance and high electrical impedance used in an electronic assembly with a heat sink
US5928767A (en) * 1995-06-07 1999-07-27 Dexter Corporation Conductive film composite

Also Published As

Publication number Publication date
EP0957664A4 (de) 1999-11-17
KR20000016429A (ko) 2000-03-25
JP3676379B2 (ja) 2005-07-27
EP0957664B1 (de) 2003-07-09
KR100280911B1 (ko) 2001-02-01
WO1997047165A1 (fr) 1997-12-11
US6254971B1 (en) 2001-07-03
EP0957664A1 (de) 1999-11-17
DE69629061T2 (de) 2004-05-13

Similar Documents

Publication Publication Date Title
DE69629061D1 (de) Harztragender metallfolie für mehrschichtige leiterplatte, verfahren zu deren herstellung, mehrschichtige leiterplatte, und elektronische vorrichtung
DE69530990D1 (de) Leiterplatte, verfahren zu deren herstellung und elektronische vorrichtungen
DE69636010D1 (de) Gedruckte schaltungsplatte und verfahren zu deren herstellung
DE69931212D1 (de) Leiterplatte und Verfahren zu deren Herstellung
DE69408189D1 (de) Kupferfolie für Leiterplatten und Verfahren zu ihrer Herstellung
DE69301941D1 (de) Kupferfolie für Leiterplatten und Verfahren zu ihrer Herstellung
DE69943397D1 (de) Mehrlagenleiterplatte und Verfahren zu ihrer Herstellung
DE69839882D1 (de) Mehrschichtige gedruckte leiterplatte und verfahren zu deren herstellung
DE69934050D1 (de) Gedruckte Leiterplatte und Verfahren zu deren Herstellung
DE69627971D1 (de) Kupferfolie für Leiterplatte, Verfahren und Gegenstand zur Herstellung
DE69431723T2 (de) Leiterplatte und verfahren zu deren herstellung
DE69120869T2 (de) Mehrschichtige gedruckte Leiterplatte und Verfahren zu ihrer Herstellung
DE69732127D1 (de) Verfahren und vorrichtung für die elektronische filmentwicklung
DE69931272D1 (de) Gedruckte leiterplatte und verfahren zu deren herstellung
DE69937153D1 (de) Gedruckte leiterplatte und verfahren zu deren herstellung
DE69117381D1 (de) Mehrschichtleiterplatte und Verfahren zu ihrer Herstellung
DE69121501T2 (de) Mehrschichtige Leiterplatte und Verfahren zu ihrer Herstellung
DE69120198D1 (de) Mehrschichtige, gedruckte Leiterplatte und Verfahren zu ihrer Herstellung
DE69611020D1 (de) Prepreg für Leiterplatten
DE60032067D1 (de) Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung
DE69015522D1 (de) Vorrichtung für elektronische Bauteile und Verfahren für die Bestückung der elektronischen Bauteile.
DE59410240D1 (de) Folienleiterplatten und verfahren zu deren herstellung
DE69202625T2 (de) Elektronische Vorrichtung und Verfahren zu ihrer Herstellung.
DE69908445D1 (de) Verbindungswerkstoff für elektronische Bauteile, elektronische Bauteile und Verfahren zu deren Herstellung
DE69113537D1 (de) Verfahren und Vorrichtung zur Musterprüfung gedrukter Schaltungsplatten.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition