DE69625007T2 - Halbleiterelement-Herstellungsverfahren - Google Patents
Halbleiterelement-HerstellungsverfahrenInfo
- Publication number
- DE69625007T2 DE69625007T2 DE69625007T DE69625007T DE69625007T2 DE 69625007 T2 DE69625007 T2 DE 69625007T2 DE 69625007 T DE69625007 T DE 69625007T DE 69625007 T DE69625007 T DE 69625007T DE 69625007 T2 DE69625007 T2 DE 69625007T2
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- device manufacturing
- manufacturing
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
- H01L21/2652—Through-implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8228—Complementary devices, e.g. complementary transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/102—Mask alignment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/975—Substrate or mask aligning feature
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21687195A JP3528350B2 (ja) | 1995-08-25 | 1995-08-25 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69625007D1 DE69625007D1 (de) | 2003-01-09 |
DE69625007T2 true DE69625007T2 (de) | 2003-07-24 |
Family
ID=16695228
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69625007T Expired - Lifetime DE69625007T2 (de) | 1995-08-25 | 1996-08-23 | Halbleiterelement-Herstellungsverfahren |
Country Status (4)
Country | Link |
---|---|
US (1) | US5830799A (de) |
EP (1) | EP0762492B1 (de) |
JP (1) | JP3528350B2 (de) |
DE (1) | DE69625007T2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19857852B4 (de) * | 1997-12-25 | 2008-12-04 | Sony Corp. | Halbleitervorrichtung und Verfahren zu deren Herstellung |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11224935A (ja) * | 1997-12-02 | 1999-08-17 | Mitsubishi Electric Corp | 半導体集積回路の基板及び半導体集積回路の製造方法 |
US6656815B2 (en) | 2001-04-04 | 2003-12-02 | International Business Machines Corporation | Process for implanting a deep subcollector with self-aligned photo registration marks |
US6596604B1 (en) * | 2002-07-22 | 2003-07-22 | Atmel Corporation | Method of preventing shift of alignment marks during rapid thermal processing |
JP3775508B1 (ja) * | 2005-03-10 | 2006-05-17 | 株式会社リコー | 半導体装置の製造方法及び半導体装置 |
JP5088460B2 (ja) * | 2005-10-20 | 2012-12-05 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP5088461B2 (ja) * | 2005-10-21 | 2012-12-05 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
KR100851751B1 (ko) * | 2006-12-27 | 2008-08-11 | 동부일렉트로닉스 주식회사 | 이미지 센서 제조 방법 |
JP2014216377A (ja) * | 2013-04-23 | 2014-11-17 | イビデン株式会社 | 電子部品とその製造方法及び多層プリント配線板の製造方法 |
CN112201579A (zh) * | 2020-08-26 | 2021-01-08 | 株洲中车时代半导体有限公司 | 一种半导体芯片对准标记的制作方法及半导体芯片 |
CN112542413B (zh) * | 2020-12-03 | 2021-09-28 | 中国电子科技集团公司第五十五研究所 | 一种异质衬底半导体薄膜器件对准方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1520925A (en) * | 1975-10-06 | 1978-08-09 | Mullard Ltd | Semiconductor device manufacture |
US4412376A (en) * | 1979-03-30 | 1983-11-01 | Ibm Corporation | Fabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantation |
JPS5891256A (ja) * | 1981-11-24 | 1983-05-31 | 新日本製鐵株式会社 | ねじ鉄筋の継手 |
US4435896A (en) * | 1981-12-07 | 1984-03-13 | Bell Telephone Laboratories, Incorporated | Method for fabricating complementary field effect transistor devices |
JPS58170047A (ja) * | 1982-03-31 | 1983-10-06 | Fujitsu Ltd | 半導体装置 |
JPS59158519A (ja) * | 1983-02-28 | 1984-09-08 | Toshiba Corp | 半導体装置の製造方法 |
US4573257A (en) * | 1984-09-14 | 1986-03-04 | Motorola, Inc. | Method of forming self-aligned implanted channel-stop and buried layer utilizing non-single crystal alignment key |
JP2545865B2 (ja) * | 1987-06-26 | 1996-10-23 | ソニー株式会社 | 半導体装置の製造方法 |
JPH03203265A (ja) * | 1989-12-28 | 1991-09-04 | Sony Corp | 半導体装置 |
MY109605A (en) * | 1990-06-29 | 1997-03-31 | Canon Kk | Method for producing semiconductor device having alignment mark. |
JPH0478123A (ja) * | 1990-07-20 | 1992-03-12 | Fujitsu Ltd | 半導体装置の製造方法 |
FR2667440A1 (fr) * | 1990-09-28 | 1992-04-03 | Philips Nv | Procede pour realiser des motifs d'alignement de masques. |
US5300797A (en) * | 1992-03-31 | 1994-04-05 | Sgs-Thomson Microelectronics, Inc. | Coplanar twin-well integrated circuit structure |
US5503962A (en) * | 1994-07-15 | 1996-04-02 | Cypress Semiconductor Corporation | Chemical-mechanical alignment mark and method of fabrication |
-
1995
- 1995-08-25 JP JP21687195A patent/JP3528350B2/ja not_active Expired - Fee Related
-
1996
- 1996-08-20 US US08/700,081 patent/US5830799A/en not_active Expired - Lifetime
- 1996-08-23 DE DE69625007T patent/DE69625007T2/de not_active Expired - Lifetime
- 1996-08-23 EP EP96401812A patent/EP0762492B1/de not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19857852B4 (de) * | 1997-12-25 | 2008-12-04 | Sony Corp. | Halbleitervorrichtung und Verfahren zu deren Herstellung |
Also Published As
Publication number | Publication date |
---|---|
JP3528350B2 (ja) | 2004-05-17 |
JPH0964192A (ja) | 1997-03-07 |
EP0762492B1 (de) | 2002-11-27 |
DE69625007D1 (de) | 2003-01-09 |
EP0762492A1 (de) | 1997-03-12 |
US5830799A (en) | 1998-11-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |