DE68928951T2 - Verfahren zur Herstellung einer integrierten Schaltung mit Bipolartransistoren - Google Patents
Verfahren zur Herstellung einer integrierten Schaltung mit BipolartransistorenInfo
- Publication number
- DE68928951T2 DE68928951T2 DE68928951T DE68928951T DE68928951T2 DE 68928951 T2 DE68928951 T2 DE 68928951T2 DE 68928951 T DE68928951 T DE 68928951T DE 68928951 T DE68928951 T DE 68928951T DE 68928951 T2 DE68928951 T2 DE 68928951T2
- Authority
- DE
- Germany
- Prior art keywords
- producing
- integrated circuit
- bipolar transistors
- bipolar
- transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63163804A JP2666384B2 (ja) | 1988-06-30 | 1988-06-30 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68928951D1 DE68928951D1 (de) | 1999-04-22 |
DE68928951T2 true DE68928951T2 (de) | 1999-09-09 |
Family
ID=15781022
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68928951T Expired - Fee Related DE68928951T2 (de) | 1988-06-30 | 1989-05-08 | Verfahren zur Herstellung einer integrierten Schaltung mit Bipolartransistoren |
Country Status (5)
Country | Link |
---|---|
US (1) | US4980748A (de) |
EP (1) | EP0349107B1 (de) |
JP (1) | JP2666384B2 (de) |
KR (1) | KR0159763B1 (de) |
DE (1) | DE68928951T2 (de) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5221856A (en) * | 1989-04-05 | 1993-06-22 | U.S. Philips Corp. | Bipolar transistor with floating guard region under extrinsic base |
KR920020676A (ko) * | 1991-04-09 | 1992-11-21 | 김광호 | 반도체 장치의 소자분리 방법 |
US5644157A (en) * | 1992-12-25 | 1997-07-01 | Nippondenso Co., Ltd. | High withstand voltage type semiconductor device having an isolation region |
US5525533A (en) * | 1993-06-03 | 1996-06-11 | United Technologies Corporation | Method of making a low voltage coefficient capacitor |
US5545926A (en) | 1993-10-12 | 1996-08-13 | Kabushiki Kaisha Toshiba | Integrated mosfet device with low resistance peripheral diffusion region contacts and low PN-junction failure memory diffusion contacts |
JPH07193121A (ja) * | 1993-12-27 | 1995-07-28 | Toshiba Corp | 半導体装置の製造方法 |
JP3653107B2 (ja) * | 1994-03-14 | 2005-05-25 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
KR0131723B1 (ko) * | 1994-06-08 | 1998-04-14 | 김주용 | 반도체소자 및 그 제조방법 |
JPH0831841A (ja) * | 1994-07-12 | 1996-02-02 | Sony Corp | 半導体装置及びその製造方法 |
JP3360970B2 (ja) * | 1995-05-22 | 2003-01-07 | 株式会社東芝 | 半導体装置の製造方法 |
US6242792B1 (en) | 1996-07-02 | 2001-06-05 | Denso Corporation | Semiconductor device having oblique portion as reflection |
JP2959491B2 (ja) | 1996-10-21 | 1999-10-06 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JP3621359B2 (ja) * | 2001-05-25 | 2005-02-16 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
EP1883955A2 (de) * | 2005-04-28 | 2008-02-06 | Nxp B.V. | Verfahren zur herstellung eines bipolartransistors |
US8461661B2 (en) * | 2009-04-06 | 2013-06-11 | Polar Semiconductor, Inc. | Locos nitride capping of deep trench polysilicon fill |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2502864B1 (fr) * | 1981-03-24 | 1986-09-05 | Asulab Sa | Circuit integre pour oscillateur a frequence reglable |
JPS5961045A (ja) * | 1982-09-29 | 1984-04-07 | Fujitsu Ltd | 半導体装置の製造方法 |
US4466177A (en) * | 1983-06-30 | 1984-08-21 | International Business Machines Corporation | Storage capacitor optimization for one device FET dynamic RAM cell |
GB2148593B (en) * | 1983-10-14 | 1987-06-10 | Hitachi Ltd | Process for manufacturing the isolating regions of a semiconductor integrated circuit device |
US4688069A (en) * | 1984-03-22 | 1987-08-18 | International Business Machines Corporation | Isolation for high density integrated circuits |
US4609934A (en) * | 1984-04-06 | 1986-09-02 | Advanced Micro Devices, Inc. | Semiconductor device having grooves of different depths for improved device isolation |
DE3580206D1 (de) * | 1984-07-31 | 1990-11-29 | Toshiba Kawasaki Kk | Bipolarer transistor und verfahren zu seiner herstellung. |
US4799099A (en) * | 1986-01-30 | 1989-01-17 | Texas Instruments Incorporated | Bipolar transistor in isolation well with angled corners |
US4666556A (en) * | 1986-05-12 | 1987-05-19 | International Business Machines Corporation | Trench sidewall isolation by polysilicon oxidation |
JPS6395662A (ja) * | 1986-10-13 | 1988-04-26 | Hitachi Ltd | 半導体装置 |
JPH01171270A (ja) * | 1987-12-26 | 1989-07-06 | Fujitsu Ltd | 半導体装置の製造方法 |
-
1988
- 1988-06-30 JP JP63163804A patent/JP2666384B2/ja not_active Expired - Fee Related
-
1989
- 1989-05-08 EP EP89304626A patent/EP0349107B1/de not_active Expired - Lifetime
- 1989-05-08 DE DE68928951T patent/DE68928951T2/de not_active Expired - Fee Related
- 1989-06-05 US US07/361,554 patent/US4980748A/en not_active Expired - Lifetime
- 1989-06-27 KR KR1019890008849A patent/KR0159763B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0349107A3 (de) | 1991-10-09 |
DE68928951D1 (de) | 1999-04-22 |
US4980748A (en) | 1990-12-25 |
KR0159763B1 (ko) | 1998-12-01 |
JP2666384B2 (ja) | 1997-10-22 |
EP0349107B1 (de) | 1999-03-17 |
KR900001037A (ko) | 1990-01-30 |
JPH0212923A (ja) | 1990-01-17 |
EP0349107A2 (de) | 1990-01-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |