DE3882251T2 - Verfahren zum Herstellen eines bipolaren Transistors unter Verwendung von CMOS-Techniken. - Google Patents
Verfahren zum Herstellen eines bipolaren Transistors unter Verwendung von CMOS-Techniken.Info
- Publication number
- DE3882251T2 DE3882251T2 DE88300586T DE3882251T DE3882251T2 DE 3882251 T2 DE3882251 T2 DE 3882251T2 DE 88300586 T DE88300586 T DE 88300586T DE 3882251 T DE3882251 T DE 3882251T DE 3882251 T2 DE3882251 T2 DE 3882251T2
- Authority
- DE
- Germany
- Prior art keywords
- making
- bipolar transistor
- cmos techniques
- cmos
- techniques
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US890687A | 1987-01-30 | 1987-01-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3882251D1 DE3882251D1 (de) | 1993-08-19 |
DE3882251T2 true DE3882251T2 (de) | 1993-10-28 |
Family
ID=21734386
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88300586T Expired - Lifetime DE3882251T2 (de) | 1987-01-30 | 1988-01-25 | Verfahren zum Herstellen eines bipolaren Transistors unter Verwendung von CMOS-Techniken. |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0281235B1 (de) |
JP (1) | JP2587444B2 (de) |
KR (1) | KR0128339B1 (de) |
CN (1) | CN1012774B (de) |
DE (1) | DE3882251T2 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0348459A (ja) * | 1989-04-26 | 1991-03-01 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
EP0414013A3 (en) * | 1989-08-23 | 1991-10-16 | Texas Instruments Incorporated | Method for forming bipolar transistor in conjunction with complementary metal oxide semiconductor transistors |
EP0478923B1 (de) * | 1990-08-31 | 1997-11-05 | Texas Instruments Incorporated | Verfahren zum Herstellen selbst-ausrichtender bipolarer Transistoren mit Heteroübergang |
US5087580A (en) * | 1990-09-17 | 1992-02-11 | Texas Instruments Incorporated | Self-aligned bipolar transistor structure and fabrication process |
US5204275A (en) * | 1990-12-26 | 1993-04-20 | North American Philips Corp. | Method for fabricating compact bipolar transistor |
DE4137101A1 (de) * | 1991-02-28 | 1992-09-03 | Daimler Benz Ag | Laterales halbleiterbauelement |
US5422290A (en) * | 1994-02-28 | 1995-06-06 | National Semiconductor Corporation | Method of fabricating BiCMOS structures |
JPH08236537A (ja) * | 1994-12-22 | 1996-09-13 | Motorola Inc | エピ層を用いない高性能高電圧バイポーラ・トランジスタ |
FR2786608B1 (fr) * | 1998-11-30 | 2001-02-09 | St Microelectronics Sa | Procede de fabrication de circuits integres bicmos sur un substrat cmos classique |
CN102244078B (zh) * | 2011-07-28 | 2013-06-12 | 江苏捷捷微电子股份有限公司 | 台面工艺可控硅芯片结构和实施方法 |
CN106033743B (zh) * | 2015-03-17 | 2019-04-02 | 北大方正集团有限公司 | BiCMOS集成电路制作方法 |
CN108063162B (zh) * | 2017-12-18 | 2020-08-28 | 南京溧水高新创业投资管理有限公司 | 双极晶体管的制作方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5989457A (ja) * | 1982-11-15 | 1984-05-23 | Hitachi Ltd | 半導体装置の製造方法 |
US4492008A (en) * | 1983-08-04 | 1985-01-08 | International Business Machines Corporation | Methods for making high performance lateral bipolar transistors |
US4536945A (en) * | 1983-11-02 | 1985-08-27 | National Semiconductor Corporation | Process for producing CMOS structures with Schottky bipolar transistors |
DE3474883D1 (en) * | 1984-01-16 | 1988-12-01 | Texas Instruments Inc | Integrated circuit having bipolar and field effect devices and method of fabrication |
EP0170250B1 (de) * | 1984-07-31 | 1990-10-24 | Kabushiki Kaisha Toshiba | Bipolarer Transistor und Verfahren zu seiner Herstellung |
-
1988
- 1988-01-25 DE DE88300586T patent/DE3882251T2/de not_active Expired - Lifetime
- 1988-01-25 EP EP88300586A patent/EP0281235B1/de not_active Expired - Lifetime
- 1988-01-26 CN CN88100466A patent/CN1012774B/zh not_active Expired
- 1988-01-29 KR KR1019880000750A patent/KR0128339B1/ko not_active IP Right Cessation
- 1988-01-29 JP JP63019442A patent/JP2587444B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE3882251D1 (de) | 1993-08-19 |
KR0128339B1 (ko) | 1998-04-06 |
JP2587444B2 (ja) | 1997-03-05 |
JPS63200568A (ja) | 1988-08-18 |
CN1012774B (zh) | 1991-06-05 |
KR890012394A (ko) | 1989-08-26 |
EP0281235B1 (de) | 1993-07-14 |
EP0281235A1 (de) | 1988-09-07 |
CN88100466A (zh) | 1988-09-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |