DE3871928T2 - Verfahren zur herstellung eines bipolaren heterouebergangstransistor. - Google Patents

Verfahren zur herstellung eines bipolaren heterouebergangstransistor.

Info

Publication number
DE3871928T2
DE3871928T2 DE8888202928T DE3871928T DE3871928T2 DE 3871928 T2 DE3871928 T2 DE 3871928T2 DE 8888202928 T DE8888202928 T DE 8888202928T DE 3871928 T DE3871928 T DE 3871928T DE 3871928 T2 DE3871928 T2 DE 3871928T2
Authority
DE
Germany
Prior art keywords
heterou
bipolar
producing
transition transistor
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888202928T
Other languages
English (en)
Other versions
DE3871928D1 (de
Inventor
Daniel Societe Civile S Selle
Daniel Societe Civil Boissenot
Patrick Societe Civi Rabinzohn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3871928D1 publication Critical patent/DE3871928D1/de
Publication of DE3871928T2 publication Critical patent/DE3871928T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/6631Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
    • H01L29/66318Heterojunction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/7605Making of isolation regions between components between components manufactured in an active substrate comprising AIII BV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41708Emitter or collector electrodes for bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42304Base electrodes for bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/737Hetero-junction transistors
    • H01L29/7371Vertical transistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/01Bipolar transistors-ion implantation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/10Lift-off masking
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/936Graded energy gap
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/944Shadow
DE8888202928T 1987-12-30 1988-12-19 Verfahren zur herstellung eines bipolaren heterouebergangstransistor. Expired - Fee Related DE3871928T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8718391A FR2625612B1 (fr) 1987-12-30 1987-12-30 Procede de realisation d'un dispositif semiconducteur du type transistor bipolaire a heterojonction

Publications (2)

Publication Number Publication Date
DE3871928D1 DE3871928D1 (de) 1992-07-16
DE3871928T2 true DE3871928T2 (de) 1993-01-14

Family

ID=9358459

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888202928T Expired - Fee Related DE3871928T2 (de) 1987-12-30 1988-12-19 Verfahren zur herstellung eines bipolaren heterouebergangstransistor.

Country Status (6)

Country Link
US (1) US4889824A (de)
EP (1) EP0322961B1 (de)
JP (1) JPH0622242B2 (de)
KR (1) KR0139414B1 (de)
DE (1) DE3871928T2 (de)
FR (1) FR2625612B1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5322814A (en) * 1987-08-05 1994-06-21 Hughes Aircraft Company Multiple-quantum-well semiconductor structures with selective electrical contacts and method of fabrication
US4954457A (en) * 1988-10-31 1990-09-04 International Business Machines Corporation Method of making heterojunction bipolar transistors
US4996165A (en) * 1989-04-21 1991-02-26 Rockwell International Corporation Self-aligned dielectric assisted planarization process
US4914049A (en) * 1989-10-16 1990-04-03 Motorola, Inc. Method of fabricating a heterojunction bipolar transistor
FR2658362A1 (fr) * 1990-02-09 1991-08-16 Philips Electronique Lab Procede de realisation par autoalignement, d'un dispositif semiconducteur integre, comprenant au moins la formation d'un premier contact d'electrode encapsule et muni d'espaceurs et d'un second contact d'electrode autoaligne sur celui-ci.
DE69129376T2 (de) * 1990-02-22 1998-09-24 Canon Kk Lateraler Bipolartransistor
US5073507A (en) * 1991-03-04 1991-12-17 Motorola, Inc. Producing a plasma containing beryllium and beryllium fluoride
US5286661A (en) * 1992-08-26 1994-02-15 Motorola, Inc. Method of forming a bipolar transistor having an emitter overhang
JPH07176688A (ja) * 1993-12-20 1995-07-14 Mitsubishi Electric Corp 半導体集積回路
US5486483A (en) * 1994-09-27 1996-01-23 Trw Inc. Method of forming closely spaced metal electrodes in a semiconductor device
US5702959A (en) * 1995-05-31 1997-12-30 Texas Instruments Incorporated Method for making an isolated vertical transistor
US5912481A (en) * 1997-09-29 1999-06-15 National Scientific Corp. Heterojunction bipolar transistor having wide bandgap, low interdiffusion base-emitter junction
US6841795B2 (en) * 2002-10-25 2005-01-11 The University Of Connecticut Semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation
US8159048B2 (en) * 2004-01-30 2012-04-17 Triquint Semiconductor, Inc. Bipolar junction transistor geometry
US9281245B2 (en) * 2012-12-28 2016-03-08 Texas Instruments Incorporated Latchup reduction by grown orthogonal substrates

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3627647A (en) * 1969-05-19 1971-12-14 Cogar Corp Fabrication method for semiconductor devices
US4032957A (en) * 1972-12-29 1977-06-28 Sony Corporation Semiconductor device
DE2555047A1 (de) * 1975-12-06 1977-06-16 Licentia Gmbh Monolithisch integrierte halbleiterschaltung
JPS5657039A (en) * 1979-10-17 1981-05-19 Fujitsu Ltd Forming method of metal pattern
JPS6066430A (ja) * 1983-09-21 1985-04-16 Oki Electric Ind Co Ltd レジストパタ−ンの形成方法
JPS6149438A (ja) * 1984-08-17 1986-03-11 Matsushita Electronics Corp 半導体装置
JPH0744182B2 (ja) * 1984-11-09 1995-05-15 株式会社日立製作所 ヘテロ接合バイポ−ラ・トランジスタ
JPS62224073A (ja) * 1986-03-26 1987-10-02 Hitachi Ltd ヘテロ接合バイポ−ラ・トランジスタの製造方法
US4818712A (en) * 1987-10-13 1989-04-04 Northrop Corporation Aluminum liftoff masking process and product

Also Published As

Publication number Publication date
EP0322961B1 (de) 1992-06-10
JPH0622242B2 (ja) 1994-03-23
EP0322961A1 (de) 1989-07-05
KR890011108A (ko) 1989-08-12
FR2625612A1 (fr) 1989-07-07
US4889824A (en) 1989-12-26
DE3871928D1 (de) 1992-07-16
FR2625612B1 (fr) 1990-05-04
JPH02110941A (ja) 1990-04-24
KR0139414B1 (ko) 1998-07-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8339 Ceased/non-payment of the annual fee