DE3876303D1 - Verfahren zur herstellung eines duennschichttransistors. - Google Patents
Verfahren zur herstellung eines duennschichttransistors.Info
- Publication number
- DE3876303D1 DE3876303D1 DE8888109197T DE3876303T DE3876303D1 DE 3876303 D1 DE3876303 D1 DE 3876303D1 DE 8888109197 T DE8888109197 T DE 8888109197T DE 3876303 T DE3876303 T DE 3876303T DE 3876303 D1 DE3876303 D1 DE 3876303D1
- Authority
- DE
- Germany
- Prior art keywords
- thin
- producing
- layer transistor
- transistor
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/909—Controlled atmosphere
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/91—Controlling charging state at semiconductor-insulator interface
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/913—Diverse treatments performed in unitary chamber
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Plasma & Fusion (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62142268A JPH0640550B2 (ja) | 1987-06-09 | 1987-06-09 | 薄膜トランジスタの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3876303D1 true DE3876303D1 (de) | 1993-01-14 |
DE3876303T2 DE3876303T2 (de) | 1993-04-01 |
Family
ID=15311400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8888109197T Expired - Fee Related DE3876303T2 (de) | 1987-06-09 | 1988-06-09 | Verfahren zur herstellung eines duennschichttransistors. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4859617A (de) |
EP (1) | EP0294802B1 (de) |
JP (1) | JPH0640550B2 (de) |
DE (1) | DE3876303T2 (de) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5214002A (en) * | 1989-10-25 | 1993-05-25 | Agency Of Industrial Science And Technology | Process for depositing a thermal CVD film of Si or Ge using a hydrogen post-treatment step and an optional hydrogen pre-treatment step |
KR930703707A (ko) * | 1991-01-30 | 1993-11-30 | 죤 죠셉 우르수 | 폴리실리콘 박막 트랜지스터 |
US5633175A (en) * | 1991-12-19 | 1997-05-27 | Hitachi, Ltd. | Process for stripping photoresist while producing liquid crystal display device |
US5254480A (en) * | 1992-02-20 | 1993-10-19 | Minnesota Mining And Manufacturing Company | Process for producing a large area solid state radiation detector |
JPH05326557A (ja) * | 1992-05-20 | 1993-12-10 | Matsushita Electric Ind Co Ltd | 薄膜の堆積方法及び薄膜トランジスタの製造方法 |
US5470768A (en) | 1992-08-07 | 1995-11-28 | Fujitsu Limited | Method for fabricating a thin-film transistor |
KR960010338B1 (ko) * | 1992-12-30 | 1996-07-30 | 현대전자산업 주식회사 | 폴리실리콘 박막트랜지스터의 수소화처리방법 |
JPH10508656A (ja) * | 1994-10-11 | 1998-08-25 | ゲレスト インコーポレーテツド | コンフオーマルなチタン系フイルムおよびその製造方法 |
WO1997048115A1 (en) * | 1996-06-12 | 1997-12-18 | The Trustees Of Princeton University | Plasma treatment of conductive layers |
US5891793A (en) * | 1997-04-04 | 1999-04-06 | Advanced Micro Devices, Inc. | Transistor fabrication process employing a common chamber for gate oxide and gate conductor formation |
US6749687B1 (en) * | 1998-01-09 | 2004-06-15 | Asm America, Inc. | In situ growth of oxide and silicon layers |
DE10080457T1 (de) * | 1999-02-12 | 2001-04-26 | Gelest Inc | CVD-Abscheidung von Wolframnitrid |
US6410432B1 (en) | 1999-04-27 | 2002-06-25 | Tokyo Electron Limited | CVD of integrated Ta and TaNx films from tantalum halide precursors |
US6268288B1 (en) | 1999-04-27 | 2001-07-31 | Tokyo Electron Limited | Plasma treated thermal CVD of TaN films from tantalum halide precursors |
US6265311B1 (en) | 1999-04-27 | 2001-07-24 | Tokyo Electron Limited | PECVD of TaN films from tantalum halide precursors |
US6413860B1 (en) | 1999-04-27 | 2002-07-02 | Tokyo Electron Limited | PECVD of Ta films from tanatalum halide precursors |
US6410433B1 (en) | 1999-04-27 | 2002-06-25 | Tokyo Electron Limited | Thermal CVD of TaN films from tantalum halide precursors |
US6348420B1 (en) | 1999-12-23 | 2002-02-19 | Asm America, Inc. | Situ dielectric stacks |
US20010051215A1 (en) * | 2000-04-13 | 2001-12-13 | Gelest, Inc. | Methods for chemical vapor deposition of titanium-silicon-nitrogen films |
DE102021002725A1 (de) | 2021-05-26 | 2022-12-01 | Semron Gmbh | Verfahren zur Herstellung von kapazitiven synaptischen Bauelementen |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2394173A1 (fr) * | 1977-06-06 | 1979-01-05 | Thomson Csf | Procede de fabrication de dispositifs electroniques qui comportent une couche mince de silicium amorphe et dispositif electronique obtenu par un tel procede |
US4113514A (en) * | 1978-01-16 | 1978-09-12 | Rca Corporation | Method of passivating a semiconductor device by treatment with atomic hydrogen |
JPS56155526A (en) * | 1980-05-06 | 1981-12-01 | Shunpei Yamazaki | Method of forming film |
JPS56156760A (en) * | 1980-05-06 | 1981-12-03 | Shunpei Yamazaki | Method and apparatus for forming coat |
JPS5712524A (en) * | 1980-06-26 | 1982-01-22 | Fujitsu Ltd | Manufacture of semiconductor device |
JPS5871660A (ja) * | 1981-10-23 | 1983-04-28 | Fujitsu Ltd | 薄膜トランジスタの製造方法 |
JPS58137218A (ja) * | 1982-02-09 | 1983-08-15 | Nec Corp | シリコン単結晶基板の処理方法 |
JPS5927576A (ja) * | 1982-08-05 | 1984-02-14 | Fujitsu Ltd | セルフアライメント形薄膜トランジスタの製造方法 |
JPS5927575A (ja) * | 1982-08-05 | 1984-02-14 | Fujitsu Ltd | セルフアライメント形薄膜トランジスタの製造方法 |
GB2140202A (en) * | 1983-05-16 | 1984-11-21 | Philips Electronic Associated | Methods of manufacturing semiconductor devices |
JPS6016462A (ja) * | 1983-07-08 | 1985-01-28 | Seiko Epson Corp | 半導体装置の製造方法 |
JPS61133662A (ja) * | 1984-12-03 | 1986-06-20 | Canon Inc | アクテイブマトリクス型薄膜トランジスタ基板 |
JPS6251264A (ja) * | 1985-08-30 | 1987-03-05 | Hitachi Ltd | 薄膜トランジスタの製造方法 |
JPS62221163A (ja) * | 1986-03-24 | 1987-09-29 | Toppan Printing Co Ltd | 薄膜トランジスタの作成方法 |
-
1987
- 1987-06-09 JP JP62142268A patent/JPH0640550B2/ja not_active Expired - Lifetime
-
1988
- 1988-06-03 US US07/201,967 patent/US4859617A/en not_active Expired - Lifetime
- 1988-06-09 DE DE8888109197T patent/DE3876303T2/de not_active Expired - Fee Related
- 1988-06-09 EP EP88109197A patent/EP0294802B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0294802B1 (de) | 1992-12-02 |
DE3876303T2 (de) | 1993-04-01 |
JPS63306668A (ja) | 1988-12-14 |
EP0294802A1 (de) | 1988-12-14 |
JPH0640550B2 (ja) | 1994-05-25 |
US4859617A (en) | 1989-08-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |