DE3583808D1 - Verfahren zum herstellen eines transistors. - Google Patents

Verfahren zum herstellen eines transistors.

Info

Publication number
DE3583808D1
DE3583808D1 DE8585101776T DE3583808T DE3583808D1 DE 3583808 D1 DE3583808 D1 DE 3583808D1 DE 8585101776 T DE8585101776 T DE 8585101776T DE 3583808 T DE3583808 T DE 3583808T DE 3583808 D1 DE3583808 D1 DE 3583808D1
Authority
DE
Germany
Prior art keywords
transistor
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585101776T
Other languages
English (en)
Inventor
Tetsuo Toyooka
Masatoshi Shiraishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Application granted granted Critical
Publication of DE3583808D1 publication Critical patent/DE3583808D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H01L29/66295—Silicon vertical transistors with main current going through the whole silicon substrate, e.g. power bipolar transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/01—Bipolar transistors-ion implantation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
DE8585101776T 1984-02-20 1985-02-18 Verfahren zum herstellen eines transistors. Expired - Lifetime DE3583808D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59030654A JPS60175453A (ja) 1984-02-20 1984-02-20 トランジスタの製造方法

Publications (1)

Publication Number Publication Date
DE3583808D1 true DE3583808D1 (de) 1991-09-26

Family

ID=12309766

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585101776T Expired - Lifetime DE3583808D1 (de) 1984-02-20 1985-02-18 Verfahren zum herstellen eines transistors.

Country Status (4)

Country Link
US (1) US4662062A (de)
EP (1) EP0153686B1 (de)
JP (1) JPS60175453A (de)
DE (1) DE3583808D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0611053B2 (ja) * 1984-12-20 1994-02-09 三菱電機株式会社 半導体装置の製造方法
US5077227A (en) * 1986-06-03 1991-12-31 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
US4740478A (en) * 1987-01-30 1988-04-26 Motorola Inc. Integrated circuit method using double implant doping
US4857476A (en) * 1988-01-26 1989-08-15 Hewlett-Packard Company Bipolar transistor process using sidewall spacer for aligning base insert
JP2728671B2 (ja) * 1988-02-03 1998-03-18 株式会社東芝 バイポーラトランジスタの製造方法
JPH0766925B2 (ja) * 1990-12-26 1995-07-19 財団法人韓国電子通信研究所 ガリウム砒素金属半導体電界効果トランジスタの製造方法
US5637910A (en) * 1994-02-02 1997-06-10 Rohm Co., Ltd. Multi-emitter or a multi-base transistor
US5904536A (en) * 1998-05-01 1999-05-18 National Semiconductor Corporation Self aligned poly emitter bipolar technology using damascene technique
US6225181B1 (en) 1999-04-19 2001-05-01 National Semiconductor Corp. Trench isolated bipolar transistor structure integrated with CMOS technology
US6043130A (en) * 1999-05-17 2000-03-28 National Semiconductor Corporation Process for forming bipolar transistor compatible with CMOS utilizing tilted ion implanted base
US6262472B1 (en) 1999-05-17 2001-07-17 National Semiconductor Corporation Bipolar transistor compatible with CMOS utilizing tilted ion implanted base
US6313000B1 (en) 1999-11-18 2001-11-06 National Semiconductor Corporation Process for formation of vertically isolated bipolar transistor device

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3707410A (en) * 1965-07-30 1972-12-26 Hitachi Ltd Method of manufacturing semiconductor devices
DE1614827C2 (de) * 1967-06-22 1979-06-21 Telefunken Patentverwertungsgesellschaft Mbh, 7900 Ulm Verfahren zum Herstellen eines Transistors
FR1569872A (de) * 1968-04-10 1969-06-06
US3595716A (en) * 1968-05-16 1971-07-27 Philips Corp Method of manufacturing semiconductor devices
US3717507A (en) * 1969-06-19 1973-02-20 Shibaura Electric Co Ltd Method of manufacturing semiconductor devices utilizing ion-implantation and arsenic diffusion
US4124933A (en) * 1974-05-21 1978-11-14 U.S. Philips Corporation Methods of manufacturing semiconductor devices
US4381953A (en) * 1980-03-24 1983-05-03 International Business Machines Corporation Polysilicon-base self-aligned bipolar transistor process
US4512075A (en) * 1980-08-04 1985-04-23 Fairchild Camera & Instrument Corporation Method of making an integrated injection logic cell having self-aligned collector and base reduced resistance utilizing selective diffusion from polycrystalline regions
FR2508704B1 (fr) * 1981-06-26 1985-06-07 Thomson Csf Procede de fabrication de transistors bipolaires integres de tres petites dimensions
US4536950A (en) * 1983-02-10 1985-08-27 Matsushita Electric Industrial Co., Ltd. Method for making semiconductor device

Also Published As

Publication number Publication date
EP0153686A3 (en) 1987-08-26
EP0153686A2 (de) 1985-09-04
US4662062A (en) 1987-05-05
EP0153686B1 (de) 1991-08-21
JPS60175453A (ja) 1985-09-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee