DE69617131D1 - Verfahren zur Herstellung eines integrierten Halbleiterschaltungsbauelements, das mit einem Hochspannungs-MOS-Transistor versehen ist - Google Patents
Verfahren zur Herstellung eines integrierten Halbleiterschaltungsbauelements, das mit einem Hochspannungs-MOS-Transistor versehen istInfo
- Publication number
- DE69617131D1 DE69617131D1 DE69617131T DE69617131T DE69617131D1 DE 69617131 D1 DE69617131 D1 DE 69617131D1 DE 69617131 T DE69617131 T DE 69617131T DE 69617131 T DE69617131 T DE 69617131T DE 69617131 D1 DE69617131 D1 DE 69617131D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- integrated circuit
- mos transistor
- semiconductor integrated
- circuit component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823864—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP07195093A JP3143366B2 (ja) | 1995-07-31 | 1995-07-31 | Cmos半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69617131D1 true DE69617131D1 (de) | 2002-01-03 |
DE69617131T2 DE69617131T2 (de) | 2002-07-18 |
Family
ID=16335420
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69617131T Expired - Fee Related DE69617131T2 (de) | 1995-07-31 | 1996-07-31 | Verfahren zur Herstellung eines integrierten Halbleiterschaltungsbauelements, das mit einem Hochspannungs-MOS-Transistor versehen ist |
Country Status (5)
Country | Link |
---|---|
US (1) | US5940708A (de) |
EP (1) | EP0757391B1 (de) |
JP (1) | JP3143366B2 (de) |
KR (1) | KR100200457B1 (de) |
DE (1) | DE69617131T2 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100415191B1 (ko) * | 1997-06-25 | 2004-03-26 | 삼성전자주식회사 | 비대칭형 씨모스 트랜지스터의 제조 방법 |
US6605845B1 (en) * | 1997-09-30 | 2003-08-12 | Intel Corporation | Asymmetric MOSFET using spacer gate technique |
JP3527148B2 (ja) * | 1999-09-24 | 2004-05-17 | 日本電気株式会社 | 半導体装置の製造方法 |
JP2005191228A (ja) | 2003-12-25 | 2005-07-14 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP4718894B2 (ja) * | 2005-05-19 | 2011-07-06 | 株式会社東芝 | 半導体装置の製造方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2947350A1 (de) * | 1979-11-23 | 1981-05-27 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von mnos-speichertransistoren mit sehr kurzer kanallaenge in silizium-gate-technologie |
JPS6295873A (ja) * | 1985-10-23 | 1987-05-02 | Hitachi Ltd | 電界効果トランジスタ |
US5015595A (en) * | 1988-09-09 | 1991-05-14 | Advanced Micro Devices, Inc. | Method of making a high performance MOS device having both P- and N-LDD regions using single photoresist mask |
US5234853A (en) * | 1990-03-05 | 1993-08-10 | Fujitsu Limited | Method of producing a high voltage MOS transistor |
JP2545762B2 (ja) * | 1990-04-13 | 1996-10-23 | 日本電装株式会社 | 高耐圧misトランジスタおよびこのトランジスタを有する相補型トランジスタの製造方法 |
JPH05267604A (ja) * | 1991-05-08 | 1993-10-15 | Seiko Instr Inc | 半導体装置の製造方法 |
EP0535674B1 (de) * | 1991-10-01 | 1998-02-18 | Nec Corporation | Verfahren zur Herstellung von einem LDD-MOSFET |
JP3163694B2 (ja) * | 1991-12-06 | 2001-05-08 | ソニー株式会社 | 半導体装置及びその製法 |
JP3216206B2 (ja) * | 1992-03-30 | 2001-10-09 | 株式会社デンソー | 半導体装置及びその製造方法 |
US5322804A (en) * | 1992-05-12 | 1994-06-21 | Harris Corporation | Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps |
JPH05343670A (ja) * | 1992-06-10 | 1993-12-24 | Sony Corp | オフセット構造のmosトランジスタおよびその製造方法 |
US5559044A (en) * | 1992-09-21 | 1996-09-24 | Siliconix Incorporated | BiCDMOS process technology |
JPH0758212A (ja) * | 1993-08-19 | 1995-03-03 | Sony Corp | Cmos集積回路 |
JP2981717B2 (ja) * | 1994-09-02 | 1999-11-22 | セイコーインスツルメンツ株式会社 | 半導体集積回路装置 |
-
1995
- 1995-07-31 JP JP07195093A patent/JP3143366B2/ja not_active Expired - Lifetime
-
1996
- 1996-07-30 KR KR1019960031393A patent/KR100200457B1/ko not_active IP Right Cessation
- 1996-07-31 US US08/690,485 patent/US5940708A/en not_active Expired - Lifetime
- 1996-07-31 DE DE69617131T patent/DE69617131T2/de not_active Expired - Fee Related
- 1996-07-31 EP EP96112365A patent/EP0757391B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5940708A (en) | 1999-08-17 |
EP0757391B1 (de) | 2001-11-21 |
KR100200457B1 (ko) | 1999-07-01 |
EP0757391A2 (de) | 1997-02-05 |
JP3143366B2 (ja) | 2001-03-07 |
KR970008643A (ko) | 1997-02-24 |
DE69617131T2 (de) | 2002-07-18 |
JPH0945790A (ja) | 1997-02-14 |
EP0757391A3 (de) | 1998-12-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |