DE69841896D1 - Verfahren zur Herstellung eines Transistors mit einem Silizium-Germanium-Gatter - Google Patents

Verfahren zur Herstellung eines Transistors mit einem Silizium-Germanium-Gatter

Info

Publication number
DE69841896D1
DE69841896D1 DE69841896T DE69841896T DE69841896D1 DE 69841896 D1 DE69841896 D1 DE 69841896D1 DE 69841896 T DE69841896 T DE 69841896T DE 69841896 T DE69841896 T DE 69841896T DE 69841896 D1 DE69841896 D1 DE 69841896D1
Authority
DE
Germany
Prior art keywords
transistor
producing
silicon germanium
germanium gate
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69841896T
Other languages
English (en)
Inventor
Isabelle Sagnes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zarbana Digital Fund LLC
Original Assignee
Fahrenheit Thermoscope LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fahrenheit Thermoscope LLC filed Critical Fahrenheit Thermoscope LLC
Application granted granted Critical
Publication of DE69841896D1 publication Critical patent/DE69841896D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/2807—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being Si or Ge or C and their alloys except Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
DE69841896T 1997-06-25 1998-06-12 Verfahren zur Herstellung eines Transistors mit einem Silizium-Germanium-Gatter Expired - Lifetime DE69841896D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9707938A FR2765394B1 (fr) 1997-06-25 1997-06-25 Procede d'obtention d'un transistor a grille en silicium-germanium

Publications (1)

Publication Number Publication Date
DE69841896D1 true DE69841896D1 (de) 2010-10-28

Family

ID=9508412

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69841896T Expired - Lifetime DE69841896D1 (de) 1997-06-25 1998-06-12 Verfahren zur Herstellung eines Transistors mit einem Silizium-Germanium-Gatter

Country Status (5)

Country Link
US (1) US5998289A (de)
EP (1) EP0887843B1 (de)
JP (1) JP4601734B2 (de)
DE (1) DE69841896D1 (de)
FR (1) FR2765394B1 (de)

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FR2765393B1 (fr) * 1997-06-25 2001-11-30 France Telecom Procede de gravure d'une couche de si1-xgex polycristallin ou d'un empilement d'une couche de si1-xgex polycristallin et d'une couche de si polycristallin, et son application a la microelectronique
US6180499B1 (en) * 1998-09-29 2001-01-30 Advanced Micro Devices, Inc. Method for forming polysilicon-germanium gate in CMOS transistor and device made thereby
JP3616514B2 (ja) * 1998-11-17 2005-02-02 株式会社東芝 半導体集積回路及びその製造方法
KR100881472B1 (ko) 1999-02-04 2009-02-05 어플라이드 머티어리얼스, 인코포레이티드 소정 기판 상에 놓여져 있는 패턴화된 마스크 표면 위로 적층 구조물을 증착하기 위한 방법
US6197673B1 (en) * 1999-06-08 2001-03-06 United Semiconductor Corp. Method of fabricating passivation of gate electrode
US6787805B1 (en) 1999-06-23 2004-09-07 Seiko Epson Corporation Semiconductor device and manufacturing method
US6441464B1 (en) * 1999-09-22 2002-08-27 International Business Machines Corporation Gate oxide stabilization by means of germanium components in gate conductor
KR100336572B1 (ko) * 1999-11-04 2002-05-16 박종섭 폴리 실리콘-저마늄을 게이트 전극으로 사용하는 반도체소자의 형성방법
US6373112B1 (en) * 1999-12-02 2002-04-16 Intel Corporation Polysilicon-germanium MOSFET gate electrodes
WO2001041544A2 (en) * 1999-12-11 2001-06-14 Asm America, Inc. Deposition of gate stacks including silicon germanium layers
WO2001050536A1 (fr) * 2000-01-07 2001-07-12 Sharp Kabushiki Kaisha Dispositif semi-conducteur, son procede de fabrication et dispositif de traitement de l'information
KR100587053B1 (ko) * 2000-06-30 2006-06-07 주식회사 하이닉스반도체 반도체 소자의 제조방법
US6399469B1 (en) * 2000-07-10 2002-06-04 Advanced Micro Devices, Inc. Fabrication of a notched gate structure for a field effect transistor using a single patterning and etch process
US6423632B1 (en) 2000-07-21 2002-07-23 Motorola, Inc. Semiconductor device and a process for forming the same
US6891235B1 (en) 2000-11-15 2005-05-10 International Business Machines Corporation FET with T-shaped gate
KR100425934B1 (ko) 2000-12-29 2004-04-03 주식회사 하이닉스반도체 실리콘-게르마늄막 형성 방법
EP1421607A2 (de) 2001-02-12 2004-05-26 ASM America, Inc. Verbesserter prozess zur ablagerung von halbleiterfilmen
US7026219B2 (en) 2001-02-12 2006-04-11 Asm America, Inc. Integration of high k gate dielectric
US6432763B1 (en) * 2001-03-15 2002-08-13 Advanced Micro Devices, Inc. Field effect transistor having doped gate with prevention of contamination from the gate during implantation
FR2823009B1 (fr) * 2001-04-02 2004-07-09 St Microelectronics Sa Procede de fabrication d'un transistor vertical a grille isolee a faible recouvrement de la grille sur la source et sur le drain, et circuit integre comportant un tel transistor
US6952040B2 (en) * 2001-06-29 2005-10-04 Intel Corporation Transistor structure and method of fabrication
KR20030002759A (ko) * 2001-06-29 2003-01-09 주식회사 하이닉스반도체 반도체 소자의 트랜지스터 제조 방법
US6566210B2 (en) * 2001-07-13 2003-05-20 International Business Machines Corporation Method of improving gate activation by employing atomic oxygen enhanced oxidation
US6730588B1 (en) * 2001-12-20 2004-05-04 Lsi Logic Corporation Method of forming SiGe gate electrode
KR100487525B1 (ko) * 2002-04-25 2005-05-03 삼성전자주식회사 실리콘게르마늄 게이트를 이용한 반도체 소자 및 그 제조방법
US7186630B2 (en) 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
WO2004036636A1 (en) * 2002-10-18 2004-04-29 Applied Materials, Inc. A film stack having a silicon germanium layer and a thin amorphous seed layer
US6686637B1 (en) 2002-11-21 2004-02-03 International Business Machines Corporation Gate structure with independently tailored vertical doping profile
US6838695B2 (en) * 2002-11-25 2005-01-04 International Business Machines Corporation CMOS device structure with improved PFET gate electrode
US7229919B2 (en) * 2003-01-08 2007-06-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having a random grained polysilicon layer and a method for its manufacture
US6780741B2 (en) 2003-01-08 2004-08-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a novel gate electrode structure comprised of a silicon-germanium layer located between random grained polysilicon layers
US6905976B2 (en) * 2003-05-06 2005-06-14 International Business Machines Corporation Structure and method of forming a notched gate field effect transistor
JP3742906B2 (ja) * 2003-05-08 2006-02-08 シャープ株式会社 半導体装置の製造方法
US7199011B2 (en) * 2003-07-16 2007-04-03 Texas Instruments Incorporated Method to reduce transistor gate to source/drain overlap capacitance by incorporation of carbon
JP2005079310A (ja) * 2003-08-29 2005-03-24 Semiconductor Leading Edge Technologies Inc 半導体装置及びその製造方法
US20050199872A1 (en) * 2004-03-10 2005-09-15 Tokyo Electron Limited Of Tbs Broadcast Center Silicon-germanium thin layer semiconductor structure with variable silicon-germanium composition and method of fabrication
US7682985B2 (en) * 2004-03-17 2010-03-23 Lam Research Corporation Dual doped polysilicon and silicon germanium etch
US7135391B2 (en) * 2004-05-21 2006-11-14 International Business Machines Corporation Polycrystalline SiGe junctions for advanced devices
WO2006007313A2 (en) * 2004-06-25 2006-01-19 Applied Materials, Inc. Improving water-barrier performance of an encapsulating film
US7157341B2 (en) * 2004-10-01 2007-01-02 International Business Machines Corporation Gate stacks
US20070155138A1 (en) * 2005-05-24 2007-07-05 Pierre Tomasini Apparatus and method for depositing silicon germanium films
JP2007019400A (ja) * 2005-07-11 2007-01-25 Renesas Technology Corp Ｍｏｓ構造を有する半導体装置およびその製造方法
CN102692682B (zh) * 2012-06-12 2013-07-17 中国科学院上海微系统与信息技术研究所 一种光栅耦合器及其制作方法

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US5019882A (en) * 1989-05-15 1991-05-28 International Business Machines Corporation Germanium channel silicon MOSFET
US5155571A (en) * 1990-08-06 1992-10-13 The Regents Of The University Of California Complementary field effect transistors having strained superlattice structure
US5241214A (en) * 1991-04-29 1993-08-31 Massachusetts Institute Of Technology Oxides and nitrides of metastabale group iv alloys and nitrides of group iv elements and semiconductor devices formed thereof
US5461250A (en) * 1992-08-10 1995-10-24 International Business Machines Corporation SiGe thin film or SOI MOSFET and method for making the same
US5354700A (en) * 1993-07-26 1994-10-11 United Microelectronics Corporation Method of manufacturing super channel TFT structure
US5461243A (en) * 1993-10-29 1995-10-24 International Business Machines Corporation Substrate for tensilely strained semiconductor
JPH07202178A (ja) * 1993-12-28 1995-08-04 Toshiba Corp 半導体装置およびその製造方法
US5985703A (en) * 1994-10-24 1999-11-16 Banerjee; Sanjay Method of making thin film transistors
JPH08186256A (ja) * 1994-12-29 1996-07-16 Sony Corp Ｌｄｄ構造のトランジスタの製造方法及びトランジスタ

Also Published As

Publication number Publication date
JP4601734B2 (ja) 2010-12-22
EP0887843B1 (de) 2010-09-15
US5998289A (en) 1999-12-07
FR2765394A1 (fr) 1998-12-31
FR2765394B1 (fr) 1999-09-24
EP0887843A1 (de) 1998-12-30
JPH1187708A (ja) 1999-03-30

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