DE60045447D1 - Verfahren zur Herstellung eines zweifach vertieften Transistors - Google Patents

Verfahren zur Herstellung eines zweifach vertieften Transistors

Info

Publication number
DE60045447D1
DE60045447D1 DE60045447T DE60045447T DE60045447D1 DE 60045447 D1 DE60045447 D1 DE 60045447D1 DE 60045447 T DE60045447 T DE 60045447T DE 60045447 T DE60045447 T DE 60045447T DE 60045447 D1 DE60045447 D1 DE 60045447D1
Authority
DE
Germany
Prior art keywords
producing
recessed transistor
doubly
doubly recessed
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60045447T
Other languages
English (en)
Inventor
William E Hoke
Katerina Hur
Rebecca Mctaggart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Application granted granted Critical
Publication of DE60045447D1 publication Critical patent/DE60045447D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28537—Deposition of Schottky electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47—Schottky barrier electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • H01L29/7785—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material with more than one donor layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10337—Indium gallium arsenide [InGaAs]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Weting (AREA)
DE60045447T 1999-08-06 2000-08-07 Verfahren zur Herstellung eines zweifach vertieften Transistors Expired - Lifetime DE60045447D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/369,954 US6271547B1 (en) 1999-08-06 1999-08-06 Double recessed transistor with resistive layer
PCT/US2000/021470 WO2001011695A1 (en) 1999-08-06 2000-08-07 Double recessed transistor

Publications (1)

Publication Number Publication Date
DE60045447D1 true DE60045447D1 (de) 2011-02-10

Family

ID=23457629

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60045447T Expired - Lifetime DE60045447D1 (de) 1999-08-06 2000-08-07 Verfahren zur Herstellung eines zweifach vertieften Transistors

Country Status (6)

Country Link
US (3) US6271547B1 (de)
EP (1) EP1210736B1 (de)
JP (2) JP2003531470A (de)
KR (1) KR100483376B1 (de)
DE (1) DE60045447D1 (de)
WO (1) WO2001011695A1 (de)

Families Citing this family (75)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6271547B1 (en) 1999-08-06 2001-08-07 Raytheon Company Double recessed transistor with resistive layer
US6797994B1 (en) * 2000-02-14 2004-09-28 Raytheon Company Double recessed transistor
US6489639B1 (en) * 2000-05-24 2002-12-03 Raytheon Company High electron mobility transistor
JP2003174039A (ja) * 2001-09-27 2003-06-20 Murata Mfg Co Ltd ヘテロ接合電界効果トランジスタ
US7488992B2 (en) * 2003-12-04 2009-02-10 Lockheed Martin Corporation Electronic device comprising enhancement mode pHEMT devices, depletion mode pHEMT devices, and power pHEMT devices on a single substrate and method of creation
JP4801325B2 (ja) * 2004-04-08 2011-10-26 パナソニック株式会社 Ｉｉｉ−ｖ族窒化物半導体を用いた半導体装置
US7321132B2 (en) * 2005-03-15 2008-01-22 Lockheed Martin Corporation Multi-layer structure for use in the fabrication of integrated circuit devices and methods for fabrication of same
US7226850B2 (en) 2005-05-19 2007-06-05 Raytheon Company Gallium nitride high electron mobility transistor structure
US20070052048A1 (en) * 2005-09-08 2007-03-08 Raytheon Company Strain compensated high electron mobility transistor
KR100631051B1 (ko) * 2005-09-12 2006-10-04 한국전자통신연구원 부정형 고 전자 이동도 트랜지스터의 제조 방법
JP2007227884A (ja) * 2006-01-30 2007-09-06 Matsushita Electric Ind Co Ltd 電界効果トランジスタ
JP2007311684A (ja) * 2006-05-22 2007-11-29 Mitsubishi Electric Corp 電界効果型トランジスタ
US20100047959A1 (en) * 2006-08-07 2010-02-25 Emcore Solar Power, Inc. Epitaxial Lift Off on Film Mounted Inverted Metamorphic Multijunction Solar Cells
JP5183913B2 (ja) * 2006-11-24 2013-04-17 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
US8476125B2 (en) * 2006-12-15 2013-07-02 University Of South Carolina Fabrication technique for high frequency, high power group III nitride electronic devices
US8314011B2 (en) 2008-05-30 2012-11-20 Alta Devices, Inc. Epitaxial lift off stack having a non-uniform handle and methods thereof
CN102177572A (zh) * 2008-10-10 2011-09-07 奥塔装置公司 用于外延剥离的台面蚀刻方法和组成
US8778199B2 (en) 2009-02-09 2014-07-15 Emoore Solar Power, Inc. Epitaxial lift off in inverted metamorphic multijunction solar cells
US8273617B2 (en) 2009-09-30 2012-09-25 Suvolta, Inc. Electronic devices and systems, and methods for making and using the same
US8421162B2 (en) 2009-09-30 2013-04-16 Suvolta, Inc. Advanced transistors with punch through suppression
US8530286B2 (en) 2010-04-12 2013-09-10 Suvolta, Inc. Low power semiconductor transistor structure and method of fabrication thereof
US8569128B2 (en) 2010-06-21 2013-10-29 Suvolta, Inc. Semiconductor structure and method of fabrication thereof with mixed metal types
US8759872B2 (en) 2010-06-22 2014-06-24 Suvolta, Inc. Transistor with threshold voltage set notch and method of fabrication thereof
US8377783B2 (en) 2010-09-30 2013-02-19 Suvolta, Inc. Method for reducing punch-through in a transistor device
US8404551B2 (en) 2010-12-03 2013-03-26 Suvolta, Inc. Source/drain extension control for advanced transistors
US8461875B1 (en) 2011-02-18 2013-06-11 Suvolta, Inc. Digital circuits having improved transistors, and methods therefor
US8525271B2 (en) 2011-03-03 2013-09-03 Suvolta, Inc. Semiconductor structure with improved channel stack and method for fabrication thereof
US8400219B2 (en) 2011-03-24 2013-03-19 Suvolta, Inc. Analog circuits having improved transistors, and methods therefor
US8748270B1 (en) 2011-03-30 2014-06-10 Suvolta, Inc. Process for manufacturing an improved analog transistor
US8999861B1 (en) 2011-05-11 2015-04-07 Suvolta, Inc. Semiconductor structure with substitutional boron and method for fabrication thereof
US8796048B1 (en) 2011-05-11 2014-08-05 Suvolta, Inc. Monitoring and measurement of thin film layers
US8811068B1 (en) 2011-05-13 2014-08-19 Suvolta, Inc. Integrated circuit devices and methods
US8569156B1 (en) 2011-05-16 2013-10-29 Suvolta, Inc. Reducing or eliminating pre-amorphization in transistor manufacture
US8735987B1 (en) 2011-06-06 2014-05-27 Suvolta, Inc. CMOS gate stack structures and processes
US8995204B2 (en) 2011-06-23 2015-03-31 Suvolta, Inc. Circuit devices and methods having adjustable transistor body bias
US8629016B1 (en) 2011-07-26 2014-01-14 Suvolta, Inc. Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer
KR101891373B1 (ko) 2011-08-05 2018-08-24 엠아이이 후지쯔 세미컨덕터 리미티드 핀 구조물을 갖는 반도체 디바이스 및 그 제조 방법
US8748986B1 (en) 2011-08-05 2014-06-10 Suvolta, Inc. Electronic device with controlled threshold voltage
US8614128B1 (en) 2011-08-23 2013-12-24 Suvolta, Inc. CMOS structures and processes based on selective thinning
US8645878B1 (en) 2011-08-23 2014-02-04 Suvolta, Inc. Porting a circuit design from a first semiconductor process to a second semiconductor process
US8713511B1 (en) 2011-09-16 2014-04-29 Suvolta, Inc. Tools and methods for yield-aware semiconductor manufacturing process target generation
US9236466B1 (en) 2011-10-07 2016-01-12 Mie Fujitsu Semiconductor Limited Analog circuits having improved insulated gate transistors, and methods therefor
US8895327B1 (en) 2011-12-09 2014-11-25 Suvolta, Inc. Tipless transistors, short-tip transistors, and methods and circuits therefor
US8819603B1 (en) 2011-12-15 2014-08-26 Suvolta, Inc. Memory circuits and methods of making and designing the same
US8883600B1 (en) 2011-12-22 2014-11-11 Suvolta, Inc. Transistor having reduced junction leakage and methods of forming thereof
US8599623B1 (en) 2011-12-23 2013-12-03 Suvolta, Inc. Circuits and methods for measuring circuit elements in an integrated circuit device
US8970289B1 (en) 2012-01-23 2015-03-03 Suvolta, Inc. Circuits and devices for generating bi-directional body bias voltages, and methods therefor
US8877619B1 (en) 2012-01-23 2014-11-04 Suvolta, Inc. Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom
US9093550B1 (en) 2012-01-31 2015-07-28 Mie Fujitsu Semiconductor Limited Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same
US9406567B1 (en) 2012-02-28 2016-08-02 Mie Fujitsu Semiconductor Limited Method for fabricating multiple transistor devices on a substrate with varying threshold voltages
US8863064B1 (en) 2012-03-23 2014-10-14 Suvolta, Inc. SRAM cell layout structure and devices therefrom
US8796097B2 (en) 2012-04-26 2014-08-05 University Of South Carolina Selectively area regrown III-nitride high electron mobility transistor
US9299698B2 (en) 2012-06-27 2016-03-29 Mie Fujitsu Semiconductor Limited Semiconductor structure with multiple transistors having various threshold voltages
US8637955B1 (en) 2012-08-31 2014-01-28 Suvolta, Inc. Semiconductor structure with reduced junction leakage and method of fabrication thereof
US9112057B1 (en) 2012-09-18 2015-08-18 Mie Fujitsu Semiconductor Limited Semiconductor devices with dopant migration suppression and method of fabrication thereof
US9041126B2 (en) 2012-09-21 2015-05-26 Mie Fujitsu Semiconductor Limited Deeply depleted MOS transistors having a screening layer and methods thereof
CN104854698A (zh) 2012-10-31 2015-08-19 三重富士通半导体有限责任公司 具有低变化晶体管外围电路的dram型器件以及相关方法
US8816754B1 (en) 2012-11-02 2014-08-26 Suvolta, Inc. Body bias circuits and methods
US9093997B1 (en) 2012-11-15 2015-07-28 Mie Fujitsu Semiconductor Limited Slew based process and bias monitors and related methods
US9070477B1 (en) 2012-12-12 2015-06-30 Mie Fujitsu Semiconductor Limited Bit interleaved low voltage static random access memory (SRAM) and related methods
US9112484B1 (en) 2012-12-20 2015-08-18 Mie Fujitsu Semiconductor Limited Integrated circuit process and bias monitors and related methods
US9768271B2 (en) * 2013-02-22 2017-09-19 Micron Technology, Inc. Methods, devices, and systems related to forming semiconductor power devices with a handle substrate
US9268885B1 (en) 2013-02-28 2016-02-23 Mie Fujitsu Semiconductor Limited Integrated circuit device methods and models with predicted device metric variations
US8994415B1 (en) 2013-03-01 2015-03-31 Suvolta, Inc. Multiple VDD clock buffer
US8988153B1 (en) 2013-03-09 2015-03-24 Suvolta, Inc. Ring oscillator with NMOS or PMOS variation insensitivity
US9299801B1 (en) 2013-03-14 2016-03-29 Mie Fujitsu Semiconductor Limited Method for fabricating a transistor device with a tuned dopant profile
US9112495B1 (en) 2013-03-15 2015-08-18 Mie Fujitsu Semiconductor Limited Integrated circuit device body bias circuits and methods
US9449967B1 (en) 2013-03-15 2016-09-20 Fujitsu Semiconductor Limited Transistor array structure
US9478571B1 (en) 2013-05-24 2016-10-25 Mie Fujitsu Semiconductor Limited Buried channel deeply depleted channel transistor
US8976575B1 (en) 2013-08-29 2015-03-10 Suvolta, Inc. SRAM performance monitor
US9166035B2 (en) * 2013-09-12 2015-10-20 Taiwan Semiconductor Manufacturing Company Limited Delta doping layer in MOSFET source/drain region
US9710006B2 (en) 2014-07-25 2017-07-18 Mie Fujitsu Semiconductor Limited Power up body bias circuits and methods
US9319013B2 (en) 2014-08-19 2016-04-19 Mie Fujitsu Semiconductor Limited Operational amplifier input offset correction with transistor threshold voltage adjustment
US9876082B2 (en) 2015-04-30 2018-01-23 Macom Technology Solutions Holdings, Inc. Transistor with hole barrier layer
US11309412B1 (en) * 2017-05-17 2022-04-19 Northrop Grumman Systems Corporation Shifting the pinch-off voltage of an InP high electron mobility transistor with a metal ring

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5060030A (en) 1990-07-18 1991-10-22 Raytheon Company Pseudomorphic HEMT having strained compensation layer
JP2786327B2 (ja) * 1990-10-25 1998-08-13 三菱電機株式会社 ヘテロ接合電界効果トランジスタ
US5436470A (en) * 1991-01-14 1995-07-25 Sumitomo Electric Industries, Ltd. Field effect transistor
JPH0547798A (ja) 1991-01-31 1993-02-26 Texas Instr Inc <Ti> 抵抗性ＡｌＧａＡｓを有するＧａＡｓ ＦＥＴ
JPH04260338A (ja) 1991-02-14 1992-09-16 Mitsubishi Electric Corp 半導体装置の製造方法
US5140386A (en) * 1991-05-09 1992-08-18 Raytheon Company High electron mobility transistor
US5448084A (en) 1991-05-24 1995-09-05 Raytheon Company Field effect transistors on spinel substrates
EP0569745A1 (de) 1992-05-14 1993-11-18 Siemens Aktiengesellschaft Verfahren zur Herstellung eines Feldeffekttransistoren mit asymmetrischer Gate-Struktur
JPH06104289A (ja) 1992-09-18 1994-04-15 Hitachi Ltd 半導体装置およびそれを用いた増幅回路
JPH0815213B2 (ja) 1993-01-14 1996-02-14 日本電気株式会社 電界効果トランジスタ
US5364816A (en) * 1993-01-29 1994-11-15 The United States Of America As Represented By The Secretary Of The Navy Fabrication method for III-V heterostructure field-effect transistors
JP2611735B2 (ja) * 1993-12-22 1997-05-21 日本電気株式会社 ヘテロ接合ｆｅｔ
JP2581452B2 (ja) 1994-06-06 1997-02-12 日本電気株式会社 電界効果トランジスタ
JP2643859B2 (ja) 1994-09-29 1997-08-20 日本電気株式会社 化合物半導体電界効果トランジスタ
JP3360774B2 (ja) * 1994-12-20 2002-12-24 株式会社デンソー 高電子移動度電界効果トランジスタ
US5548140A (en) 1995-06-06 1996-08-20 Hughes Aircraft Company High-Speed, low-noise millimeterwave hemt and pseudomorphic hemt
US5663583A (en) 1995-06-06 1997-09-02 Hughes Aircraft Company Low-noise and power ALGaPSb/GaInAs HEMTs and pseudomorpohic HEMTs on GaAs substrate
JPH09106946A (ja) 1995-10-11 1997-04-22 Mitsubishi Electric Corp 半導体装置，及び半導体レーザ，並びに高電子移動度トランジスタ装置
US5668387A (en) * 1995-10-26 1997-09-16 Trw Inc. Relaxed channel high electron mobility transistor
JPH10125901A (ja) * 1996-10-17 1998-05-15 Mitsubishi Electric Corp 電界効果トランジスタ，及びその製造方法
JPH10223651A (ja) * 1997-02-05 1998-08-21 Nec Corp 電界効果トランジスタ
JPH10312988A (ja) * 1997-05-13 1998-11-24 Oki Electric Ind Co Ltd 化合物半導体膜のエッチング方法
JP3588988B2 (ja) * 1997-09-18 2004-11-17 三菱電機株式会社 半導体装置
JP3119248B2 (ja) * 1997-09-29 2000-12-18 日本電気株式会社 電界効果トランジスタおよびその製造方法
US6194747B1 (en) 1997-09-29 2001-02-27 Nec Corporation Field effect transistor
US6144048A (en) * 1998-01-13 2000-11-07 Nippon Telegraph And Telephone Corporation Heterojunction field effect transistor and method of fabricating the same
US6258639B1 (en) * 1999-05-21 2001-07-10 Agilent Technologies, Inc. Sintered gate schottky barrier fet passivated by a degradation-stop layer
US6271547B1 (en) 1999-08-06 2001-08-07 Raytheon Company Double recessed transistor with resistive layer
US6797994B1 (en) * 2000-02-14 2004-09-28 Raytheon Company Double recessed transistor

Also Published As

Publication number Publication date
KR100483376B1 (ko) 2005-04-15
US20030207508A1 (en) 2003-11-06
US6573129B2 (en) 2003-06-03
EP1210736A4 (de) 2005-03-16
EP1210736B1 (de) 2010-12-29
KR20020033739A (ko) 2002-05-07
US20010029073A1 (en) 2001-10-11
WO2001011695A1 (en) 2001-02-15
US6271547B1 (en) 2001-08-07
JP2009200511A (ja) 2009-09-03
EP1210736A1 (de) 2002-06-05
JP2003531470A (ja) 2003-10-21

Similar Documents

Publication Publication Date Title
DE60045447D1 (de) Verfahren zur Herstellung eines zweifach vertieften Transistors
DE60038423D1 (de) Verfahren zur Herstellung eines Halbleiterbauelements
DE60039268D1 (de) Verfahren zur Herstellung eines TFT
DE60034406D1 (de) Verfahren zur herstellung von einem dünnschichtfeldeffekttransistor
DE60043496D1 (de) Verfahren zur herstellung eines mis-transistors auf einem halbleitersubstrat
DE60036449D1 (de) Verfahren zur hestellung eines dünnschichtfeldeffekttransistors
DE60022857D1 (de) Verfahren zur Herstellung eines Halbleiterbauelements
DE69912376D1 (de) Verfahren zur herstellung eines halbleiterbauelements
DE60239129D1 (de) Verfahren zur herstellung eines graben-gate-feldeffekttransistors
DE59804805D1 (de) Verfahren zur herstellung eines vertikalen mos-transistors
DE60044639D1 (de) Verfahren zur herstellung einer halbleitervorrichtung
DE69941230D1 (de) Verfahren zur Herstellung eines Halbleitergehäuses
DE60042254D1 (de) Verfahren zur Herstellung einer Halbleiter-Anordnung
DE60035607D1 (de) Verfahren zur herstellung eines blattförmigen waschmittels
ATA10622000A (de) Verfahren zur herstellung eines haarstreifens
DE59705585D1 (de) Verfahren zur herstellung eines mos-transistors
DE50113179D1 (de) Verfahren zur Herstellung eines Halbleiterbauelements
DE60044470D1 (de) Verfahren zur herstellung eines halbleiterelement
DE50205437D1 (de) Verfahren zur herstellung eines speicherkondensators
DE60025456D1 (de) Verfahren zur Herstellung eines selbstjustierten vertikalen Bipolartransistors
DE50001155D1 (de) Verfahren zur Herstellung eines Stutzens
ATE249417T1 (de) Verfahren zur herstellung von l- phenylephrinhydrochlorid
DE50305969D1 (de) Verfahren zur herstellung eines kurzkanal-feldeffekttransistors
DE60029027D1 (de) Verfahren zur Herstellung eines organischen Filmes
DE69922617D1 (de) Verfahren zur Herstellung eines Halbleiterbauelementes