DE69840250D1 - Verfahren zur Herstellung eines Feldeffekttransistors mit versenktem Gate - Google Patents

Verfahren zur Herstellung eines Feldeffekttransistors mit versenktem Gate

Info

Publication number
DE69840250D1
DE69840250D1 DE69840250T DE69840250T DE69840250D1 DE 69840250 D1 DE69840250 D1 DE 69840250D1 DE 69840250 T DE69840250 T DE 69840250T DE 69840250 T DE69840250 T DE 69840250T DE 69840250 D1 DE69840250 D1 DE 69840250D1
Authority
DE
Germany
Prior art keywords
sunk
fabricating
field effect
effect transistor
gate field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69840250T
Other languages
English (en)
Inventor
Junko Morikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Application granted granted Critical
Publication of DE69840250D1 publication Critical patent/DE69840250D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66848Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863Lateral single gate transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • H01L29/8128Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate with recessed gate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/97Specified etch stop material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)
DE69840250T 1997-06-11 1998-06-10 Verfahren zur Herstellung eines Feldeffekttransistors mit versenktem Gate Expired - Lifetime DE69840250D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15362197A JP3450155B2 (ja) 1997-06-11 1997-06-11 電界効果トランジスタとその製造方法

Publications (1)

Publication Number Publication Date
DE69840250D1 true DE69840250D1 (de) 2009-01-08

Family

ID=15566501

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69840250T Expired - Lifetime DE69840250D1 (de) 1997-06-11 1998-06-10 Verfahren zur Herstellung eines Feldeffekttransistors mit versenktem Gate

Country Status (4)

Country Link
US (2) US6172384B1 (de)
EP (1) EP0892441B1 (de)
JP (1) JP3450155B2 (de)
DE (1) DE69840250D1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6528405B1 (en) * 2000-02-18 2003-03-04 Motorola, Inc. Enhancement mode RF device and fabrication method
JP2005158800A (ja) * 2003-11-20 2005-06-16 Sharp Corp 半導体装置の製造方法及びその製造方法により製造された半導体装置
JP2005191022A (ja) * 2003-12-24 2005-07-14 Matsushita Electric Ind Co Ltd 電界効果トランジスタ及びその製造方法
US9768271B2 (en) * 2013-02-22 2017-09-19 Micron Technology, Inc. Methods, devices, and systems related to forming semiconductor power devices with a handle substrate
US9166035B2 (en) * 2013-09-12 2015-10-20 Taiwan Semiconductor Manufacturing Company Limited Delta doping layer in MOSFET source/drain region
RU2582440C1 (ru) * 2015-02-06 2016-04-27 Федеральное государственное бюджетное учреждение науки Институт сверхвысокочастотной полупроводниковой электроники Российской академии наук (ИСВЧПЭ РАН) ПОЛУПРОВОДНИКОВАЯ ТРАНЗИСТОРНАЯ НАНОГЕТЕРОСТРУКТУРА НА ПОДЛОЖКЕ GaAs С МОДИФИЦИРОВАННЫМ СТОП-СЛОЕМ AlxGa1-xAs
US9536962B1 (en) 2015-07-20 2017-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Source/drain regions for high electron mobility transistors (HEMT) and methods of forming same
US9583589B1 (en) 2015-10-14 2017-02-28 Northrop Grumman Systems Corporation Self-aligned double gate recess for semiconductor field effect transistors

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908325A (en) * 1985-09-15 1990-03-13 Trw Inc. Method of making heterojunction transistors with wide band-gap stop etch layer
US5181087A (en) * 1986-02-28 1993-01-19 Hitachi, Ltd. Semiconductor device and method of producing the same
JPS62202564A (ja) 1986-03-03 1987-09-07 Agency Of Ind Science & Technol ヘテロ接合電界効果トランジスタ
JPH03160733A (ja) 1989-11-17 1991-07-10 Sanyo Electric Co Ltd エピタキシャルウエハ
US5151758A (en) * 1991-02-20 1992-09-29 Comsat Planar-doped valley field effect transistor (PDVFET)
US5262660A (en) * 1991-08-01 1993-11-16 Trw Inc. High power pseudomorphic gallium arsenide high electron mobility transistors
JPH0582490A (ja) * 1991-09-19 1993-04-02 Hitachi Ltd 選択エツチングの方法、装置
JPH05129720A (ja) * 1991-11-07 1993-05-25 Hitachi Ltd 半導体レーザ装置
US5508535A (en) * 1992-01-09 1996-04-16 Mitsubishi Denki Kabushiki Kaisha Compound semiconductor devices
JP3160733B2 (ja) 1992-10-16 2001-04-25 大成建設株式会社 遮水構造物における漏水検知方法
JP2581452B2 (ja) * 1994-06-06 1997-02-12 日本電気株式会社 電界効果トランジスタ
JP2827905B2 (ja) 1994-06-27 1998-11-25 日本電気株式会社 Misfetおよびその製造方法
JP2643849B2 (ja) * 1994-08-01 1997-08-20 日本電気株式会社 半導体集積回路の製造方法
JPH0897237A (ja) 1994-09-29 1996-04-12 Mitsubishi Electric Corp 電界効果トランジスタ及びその製造方法
US5739557A (en) * 1995-02-06 1998-04-14 Motorola, Inc. Refractory gate heterostructure field effect transistor
JPH09321063A (ja) * 1996-05-31 1997-12-12 Nec Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US6417035B2 (en) 2002-07-09
EP0892441A3 (de) 1999-08-11
JPH113896A (ja) 1999-01-06
US6172384B1 (en) 2001-01-09
EP0892441A2 (de) 1999-01-20
JP3450155B2 (ja) 2003-09-22
US20020016083A1 (en) 2002-02-07
EP0892441B1 (de) 2008-11-26

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