DE69601067D1 - Halbleiter-Speicheranordnung, die imstande ist, die Grösse der Substratspannung abhängig vom Zustand zu setzen - Google Patents

Halbleiter-Speicheranordnung, die imstande ist, die Grösse der Substratspannung abhängig vom Zustand zu setzen

Info

Publication number
DE69601067D1
DE69601067D1 DE69601067T DE69601067T DE69601067D1 DE 69601067 D1 DE69601067 D1 DE 69601067D1 DE 69601067 T DE69601067 T DE 69601067T DE 69601067 T DE69601067 T DE 69601067T DE 69601067 D1 DE69601067 D1 DE 69601067D1
Authority
DE
Germany
Prior art keywords
magnitude
setting
state
memory device
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69601067T
Other languages
English (en)
Other versions
DE69601067T2 (de
Inventor
Jun Nakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69601067D1 publication Critical patent/DE69601067D1/de
Application granted granted Critical
Publication of DE69601067T2 publication Critical patent/DE69601067T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
DE69601067T 1996-02-15 1996-09-17 Halbleiter-Speicheranordnung, die imstande ist, die Grösse der Substratspannung abhängig vom Zustand zu setzen Expired - Fee Related DE69601067T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8027636A JPH09219092A (ja) 1996-02-15 1996-02-15 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69601067D1 true DE69601067D1 (de) 1999-01-14
DE69601067T2 DE69601067T2 (de) 1999-05-27

Family

ID=12226440

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69601067T Expired - Fee Related DE69601067T2 (de) 1996-02-15 1996-09-17 Halbleiter-Speicheranordnung, die imstande ist, die Grösse der Substratspannung abhängig vom Zustand zu setzen

Country Status (7)

Country Link
US (1) US5694365A (de)
EP (1) EP0790618B1 (de)
JP (1) JPH09219092A (de)
KR (1) KR100244837B1 (de)
CN (1) CN1113361C (de)
DE (1) DE69601067T2 (de)
TW (1) TW310434B (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3199987B2 (ja) * 1995-08-31 2001-08-20 株式会社東芝 半導体集積回路装置およびその動作検証方法
JPH1186548A (ja) 1997-09-16 1999-03-30 Mitsubishi Electric Corp 半導体記憶装置
KR100309459B1 (ko) * 1998-04-13 2001-12-17 김영환 반도체장치의기판전압발생기
KR100272511B1 (ko) * 1998-08-10 2000-11-15 김영환 반도체 메모리소자의 고전압 발생회로
JP3802239B2 (ja) * 1998-08-17 2006-07-26 株式会社東芝 半導体集積回路
JP3430050B2 (ja) * 1998-12-28 2003-07-28 日本電気株式会社 半導体記憶装置およびその駆動方法
JP2002367369A (ja) * 2001-06-05 2002-12-20 Nec Corp 半導体記憶装置
CN104610928A (zh) * 2015-02-02 2015-05-13 孙建林 一种太阳能水箱的蓄热材料的制备方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US142967A (en) * 1873-09-16 Improvement in bench-irons for harness-makers
US4401897A (en) * 1981-03-17 1983-08-30 Motorola, Inc. Substrate bias voltage regulator
JPS59162690A (ja) * 1983-03-04 1984-09-13 Nec Corp 擬似スタテイツクメモリ
JPH0778992B2 (ja) * 1988-02-23 1995-08-23 三菱電機株式会社 ダイナミック型半導体記憶装置
KR0134773B1 (ko) * 1988-07-05 1998-04-20 Hitachi Ltd 반도체 기억장치
JP2634241B2 (ja) * 1989-05-26 1997-07-23 三菱電機株式会社 半導体記憶装置
JPH04114393A (ja) * 1990-09-04 1992-04-15 Mitsubishi Electric Corp 半導体集積回路
EP0545266A3 (en) * 1991-11-29 1993-08-04 Nec Corporation Semiconductor integrated circuit
US5329168A (en) * 1991-12-27 1994-07-12 Nec Corporation Semiconductor integrated circuit device equipped with substrate biasing system selectively powered from internal and external power sources
JPH05274876A (ja) * 1992-03-30 1993-10-22 Mitsubishi Electric Corp 半導体記憶装置
KR0142967B1 (ko) * 1995-04-26 1998-08-17 김광호 반도체 메모리장치의 기판 전압 제어회로

Also Published As

Publication number Publication date
EP0790618B1 (de) 1998-12-02
TW310434B (en) 1997-07-11
DE69601067T2 (de) 1999-05-27
CN1157460A (zh) 1997-08-20
EP0790618A1 (de) 1997-08-20
KR100244837B1 (ko) 2000-02-15
KR970063246A (ko) 1997-09-12
US5694365A (en) 1997-12-02
CN1113361C (zh) 2003-07-02
JPH09219092A (ja) 1997-08-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee