DE69533537D1 - Schmelzstruktur für eine integrierte Schaltungsanordnung - Google Patents

Schmelzstruktur für eine integrierte Schaltungsanordnung

Info

Publication number
DE69533537D1
DE69533537D1 DE69533537T DE69533537T DE69533537D1 DE 69533537 D1 DE69533537 D1 DE 69533537D1 DE 69533537 T DE69533537 T DE 69533537T DE 69533537 T DE69533537 T DE 69533537T DE 69533537 D1 DE69533537 D1 DE 69533537D1
Authority
DE
Germany
Prior art keywords
integrated circuit
fuse element
circuit elements
semiconductor substrate
conductive material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69533537T
Other languages
English (en)
Other versions
DE69533537T2 (de
Inventor
Karl-Heinz Froehner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE69533537D1 publication Critical patent/DE69533537D1/de
Publication of DE69533537T2 publication Critical patent/DE69533537T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/055—Fuse
DE69533537T 1994-12-29 1995-12-22 Schmelzstruktur für eine integrierte Schaltungsanordnung Expired - Fee Related DE69533537T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US36567094A 1994-12-29 1994-12-29
US365670 1994-12-29

Publications (2)

Publication Number Publication Date
DE69533537D1 true DE69533537D1 (de) 2004-10-28
DE69533537T2 DE69533537T2 (de) 2006-07-06

Family

ID=23439841

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69533537T Expired - Fee Related DE69533537T2 (de) 1994-12-29 1995-12-22 Schmelzstruktur für eine integrierte Schaltungsanordnung

Country Status (7)

Country Link
US (2) US5827759A (de)
EP (1) EP0720230B1 (de)
JP (1) JPH08255553A (de)
KR (1) KR100405027B1 (de)
AT (1) ATE277424T1 (de)
DE (1) DE69533537T2 (de)
TW (1) TW278229B (de)

Families Citing this family (19)

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Publication number Priority date Publication date Assignee Title
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
US6218721B1 (en) * 1997-01-14 2001-04-17 Nec Corporation Semiconductor device and method of manufacturing the same
JPH10229125A (ja) * 1997-02-14 1998-08-25 Nec Corp 半導体装置
JPH11154706A (ja) * 1997-11-20 1999-06-08 Mitsubishi Electric Corp 半導体装置
US6222244B1 (en) 1998-06-08 2001-04-24 International Business Machines Corporation Electrically blowable fuse with reduced cross-sectional area
US6524941B2 (en) * 1998-06-08 2003-02-25 International Business Machines Corporation Sub-minimum wiring structure
US6037648A (en) * 1998-06-26 2000-03-14 International Business Machines Corporation Semiconductor structure including a conductive fuse and process for fabrication thereof
US6008075A (en) * 1999-02-11 1999-12-28 Vanguard International Semiconductor Corporation Method for simultaneous formation of contacts between metal layers and fuse windows in semiconductor manufacturing
US20070190751A1 (en) * 1999-03-29 2007-08-16 Marr Kenneth W Semiconductor fuses and methods for fabricating and programming the same
US6650519B1 (en) 1999-08-17 2003-11-18 Seagate Technology Llc ESD protection by a high-to-low resistance shunt
US6344679B1 (en) 1999-11-19 2002-02-05 International Business Machines Corporation Diode with alterable conductivity and method of making same
KR100314133B1 (ko) 1999-11-26 2001-11-15 윤종용 가장자리에 흡습방지막이 형성된 반도체 칩 및 이흡습방지막의 형성방법
US6489640B1 (en) 2000-10-06 2002-12-03 National Semiconductor Corporation Integrated circuit with fuse element and contact pad
US6774457B2 (en) * 2001-09-13 2004-08-10 Texas Instruments Incorporated Rectangular contact used as a low voltage fuse element
US6444503B1 (en) 2002-02-07 2002-09-03 Taiwan Semiconductor Manufacturing Company Fabricating electrical metal fuses without additional masking
US20040038458A1 (en) * 2002-08-23 2004-02-26 Marr Kenneth W. Semiconductor fuses, semiconductor devices containing the same, and methods of making and using the same
DE10346460A1 (de) 2003-10-02 2005-05-19 Infineon Technologies Ag Anordnung und Verfahren zum Schutz von Fuses/Anti-Fuses
US6946718B2 (en) * 2004-01-05 2005-09-20 Hewlett-Packard Development Company, L.P. Integrated fuse for multilayered structure
US7701035B2 (en) * 2005-11-30 2010-04-20 International Business Machines Corporation Laser fuse structures for high power applications

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847596Y2 (ja) * 1979-09-05 1983-10-29 富士通株式会社 半導体装置
JPS5694661A (en) * 1979-12-27 1981-07-31 Fujitsu Ltd Semiconductor device
NL8002634A (nl) * 1980-05-08 1981-12-01 Philips Nv Programmeerbare halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
JPS5856355A (ja) * 1981-09-30 1983-04-04 Hitachi Ltd 半導体集積回路装置
US4810663A (en) * 1981-12-07 1989-03-07 Massachusetts Institute Of Technology Method of forming conductive path by low power laser pulse
JPS59104155A (ja) * 1982-12-07 1984-06-15 Seiko Epson Corp 半導体ヒユ−ズ
US4598462A (en) * 1983-04-07 1986-07-08 Rca Corporation Method for making semiconductor device with integral fuse
JPS60176250A (ja) * 1984-02-23 1985-09-10 Toshiba Corp 半導体装置の製造方法
JPS6122650A (ja) * 1984-07-11 1986-01-31 Hitachi Ltd 欠陥救済方法および装置
US4751197A (en) * 1984-07-18 1988-06-14 Texas Instruments Incorporated Make-link programming of semiconductor devices using laser enhanced thermal breakdown of insulator
US4665295A (en) * 1984-08-02 1987-05-12 Texas Instruments Incorporated Laser make-link programming of semiconductor devices
US4912066A (en) * 1984-07-18 1990-03-27 Texas Instruments Incorporated Make-link programming of semiconductor devices using laser-enhanced thermal breakdown of insulator
US4681778A (en) * 1985-11-14 1987-07-21 Optical Materials, Inc. Method and apparatus for making electrical connections utilizing a dielectric-like metal film
JPS6329953A (ja) * 1986-07-24 1988-02-08 Matsushita Electronics Corp 半導体装置
JPS6344739A (ja) * 1986-08-12 1988-02-25 Fujitsu Ltd 半導体装置の製造方法
JPS63283060A (ja) * 1987-05-14 1988-11-18 Fujitsu Ltd 絶縁分離型半導体装置およびその製造方法
US4875086A (en) * 1987-05-22 1989-10-17 Texas Instruments Incorporated Silicon-on-insulator integrated circuits and method
DE3728979A1 (de) * 1987-08-29 1989-03-09 Bosch Gmbh Robert Planare schaltungsanordnung
US5025300A (en) * 1989-06-30 1991-06-18 At&T Bell Laboratories Integrated circuits having improved fusible links
US5185291A (en) * 1989-06-30 1993-02-09 At&T Bell Laboratories Method of making severable conductive path in an integrated-circuit device
US5387555A (en) * 1992-09-03 1995-02-07 Harris Corporation Bonded wafer processing with metal silicidation
DE69127143T2 (de) * 1990-06-25 1997-12-18 Matsushita Electronics Corp Kaltkathodenelement
EP0500034B1 (de) * 1991-02-19 2001-06-06 Texas Instruments Incorporated Antischmelzsicherungsstruktur mit Seitenwand und Herstellungsverfahren
US5241496A (en) * 1991-08-19 1993-08-31 Micron Technology, Inc. Array of read-only memory cells, eacch of which has a one-time, voltage-programmable antifuse element constructed within a trench shared by a pair of cells
US5392187A (en) * 1992-08-12 1995-02-21 North Carolina State University At Raleigh Integrated circuit power device with transient responsive current limiting means
US5282158A (en) * 1992-08-21 1994-01-25 Micron Technology, Inc. Transistor antifuse for a programmable ROM
US5395797A (en) * 1992-12-01 1995-03-07 Texas Instruments Incorporated Antifuse structure and method of fabrication
US5472901A (en) * 1994-12-02 1995-12-05 Lsi Logic Corporation Process for formation of vias (or contact openings) and fuses in the same insulation layer with minimal additional steps

Also Published As

Publication number Publication date
EP0720230A2 (de) 1996-07-03
DE69533537T2 (de) 2006-07-06
TW278229B (en) 1996-06-11
US5789794A (en) 1998-08-04
KR100405027B1 (ko) 2004-01-07
US5827759A (en) 1998-10-27
KR960026749A (ko) 1996-07-22
ATE277424T1 (de) 2004-10-15
EP0720230A3 (de) 1998-04-15
JPH08255553A (ja) 1996-10-01
EP0720230B1 (de) 2004-09-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee