DE69525558T2 - Methode zur Herstellung eines Dünnfilm-Transistors mit invertierter Struktur - Google Patents

Methode zur Herstellung eines Dünnfilm-Transistors mit invertierter Struktur

Info

Publication number
DE69525558T2
DE69525558T2 DE69525558T DE69525558T DE69525558T2 DE 69525558 T2 DE69525558 T2 DE 69525558T2 DE 69525558 T DE69525558 T DE 69525558T DE 69525558 T DE69525558 T DE 69525558T DE 69525558 T2 DE69525558 T2 DE 69525558T2
Authority
DE
Germany
Prior art keywords
layer
amorphous silicon
thin film
film transistor
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69525558T
Other languages
German (de)
English (en)
Other versions
DE69525558D1 (de
Inventor
Shin Koide
Susumi C/O Nec Corporation Ohi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69525558D1 publication Critical patent/DE69525558D1/de
Publication of DE69525558T2 publication Critical patent/DE69525558T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0316Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral bottom-gate TFTs comprising only a single gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
DE69525558T 1994-04-22 1995-04-20 Methode zur Herstellung eines Dünnfilm-Transistors mit invertierter Struktur Expired - Lifetime DE69525558T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8422994 1994-04-22

Publications (2)

Publication Number Publication Date
DE69525558D1 DE69525558D1 (de) 2002-04-04
DE69525558T2 true DE69525558T2 (de) 2002-08-22

Family

ID=13824652

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69525558T Expired - Lifetime DE69525558T2 (de) 1994-04-22 1995-04-20 Methode zur Herstellung eines Dünnfilm-Transistors mit invertierter Struktur

Country Status (5)

Country Link
US (1) US5561074A (enExample)
EP (1) EP0678907B1 (enExample)
KR (1) KR0180323B1 (enExample)
DE (1) DE69525558T2 (enExample)
TW (1) TW291597B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2833545B2 (ja) * 1995-03-06 1998-12-09 日本電気株式会社 半導体装置の製造方法
JP3082679B2 (ja) * 1996-08-29 2000-08-28 日本電気株式会社 薄膜トランジスタおよびその製造方法
WO1998057506A1 (en) * 1997-06-12 1998-12-17 Northern Telecom Limited Directory service based on geographic location of a mobile telecommunications unit
JP2001308339A (ja) 2000-02-18 2001-11-02 Sharp Corp 薄膜トランジスタ
JP4118484B2 (ja) 2000-03-06 2008-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2001257350A (ja) 2000-03-08 2001-09-21 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP4700160B2 (ja) 2000-03-13 2011-06-15 株式会社半導体エネルギー研究所 半導体装置
JP4118485B2 (ja) 2000-03-13 2008-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4683688B2 (ja) 2000-03-16 2011-05-18 株式会社半導体エネルギー研究所 液晶表示装置の作製方法
JP4393662B2 (ja) 2000-03-17 2010-01-06 株式会社半導体エネルギー研究所 液晶表示装置の作製方法
JP4785229B2 (ja) 2000-05-09 2011-10-05 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7071037B2 (en) 2001-03-06 2006-07-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
CN100477129C (zh) * 2006-02-08 2009-04-08 财团法人工业技术研究院 薄膜晶体管、有机电致发光显示元件及其制造方法
KR101576813B1 (ko) * 2007-08-17 2015-12-11 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치
KR101452204B1 (ko) * 2007-11-05 2014-10-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 박막 트랜지스터 및 상기 박막 트랜지스터를 구비하는 표시 장치
TWI487104B (zh) * 2008-11-07 2015-06-01 Semiconductor Energy Lab 半導體裝置和其製造方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61237420A (ja) * 1985-04-13 1986-10-22 Oki Electric Ind Co Ltd P型アモルフアスシリコン薄膜の製造方法
US4882295A (en) * 1985-07-26 1989-11-21 Energy Conversion Devices, Inc. Method of making a double injection field effect transistor
US5270224A (en) * 1988-03-11 1993-12-14 Fujitsu Limited Method of manufacturing a semiconductor device having a region doped to a level exceeding the solubility limit
JPH01241175A (ja) * 1988-03-23 1989-09-26 Seikosha Co Ltd 非晶質シリコン薄膜トランジスタの製造方法
US5053354A (en) * 1988-05-30 1991-10-01 Seikosha Co., Ltd. Method of fabricating a reverse staggered type silicon thin film transistor
JPH01302769A (ja) * 1988-05-30 1989-12-06 Seikosha Co Ltd 逆スタガー型シリコン薄膜トランジスタの製造方法
JPH07114285B2 (ja) * 1988-12-16 1995-12-06 日本電気株式会社 薄膜トランジスタの製造方法
US5109260A (en) * 1989-07-10 1992-04-28 Seikosha Co., Ltd. Silicon thin film transistor and method for producing the same
EP0606114A1 (en) * 1989-08-11 1994-07-13 Seiko Instruments Inc. Method of producing field effect transistor
DE4192351T (enExample) * 1990-10-05 1992-10-08
JPH04321275A (ja) * 1991-04-19 1992-11-11 Nec Corp 薄膜トランジスタ
JPH04367276A (ja) * 1991-06-14 1992-12-18 Nec Corp 薄膜トランジスタおよびその製造方法
JPH04367277A (ja) * 1991-06-14 1992-12-18 Nec Corp 薄膜トランジスタおよびその製造方法
JPH0583197A (ja) * 1991-09-21 1993-04-02 Alpine Electron Inc デイジタルオーデイオ装置

Also Published As

Publication number Publication date
EP0678907B1 (en) 2002-02-27
DE69525558D1 (de) 2002-04-04
KR0180323B1 (ko) 1999-04-15
KR950030282A (ko) 1995-11-24
EP0678907A3 (en) 1997-08-20
EP0678907A2 (en) 1995-10-25
TW291597B (enExample) 1996-11-21
US5561074A (en) 1996-10-01

Similar Documents

Publication Publication Date Title
DE69525558T2 (de) Methode zur Herstellung eines Dünnfilm-Transistors mit invertierter Struktur
DE69030822T2 (de) Halbleitervorrichtung und Verfahren zu ihrer Herstellung
DE69522370T2 (de) SiGe-Dünnfilm-Halbleiteranordnung mit SiGe Schichtstruktur und Verfahren zur Herstellung
DE69836654T2 (de) Halbleiterstruktur mit abruptem Dotierungsprofil
EP0080652B1 (de) Fototransistor in MOS-Dünnschichttechnik, Verfahren zu seiner Herstellung und Verfahren zu seinem Betrieb
DE3331601C2 (de) Halbleiterbauelement
DE69226666T2 (de) Verfahren zur Herstellung eines Mehrfachgate-Dünnfilmtransistors
DE69322565T2 (de) Diamant-Halbleiteranordnung
DE69217682T2 (de) Verfahren zur Herstellung von Halbleiteranordnungen und integrierten Schaltkreisen mit Verwendung von Seitenwand-Abstandsstücken
DE69128554T2 (de) Verfahren zur Herstellung einer integrierten Schaltungsstruktur mit niedrig dotiertem Drain und eine MOS-integrierte Schaltungsstruktur
DE68926980T2 (de) Verfahren zur Herstellung eines Dünnfilmtransistors
DE3853351T2 (de) Siliciumcarbidsperre zwischen einem Siliciumsubstrat und einer Metallschicht.
DE69734643T2 (de) Elektronische einrichtung mit nitrid-chrom enthaltenden elektroden und verfahren zur herstellung
DE3419080A1 (de) Verfahren zum herstellen eines feldeffekttransistors
DE3541587A1 (de) Verfahren zur herstellung eines duennen halbleiterfilms
DE3211761A1 (de) Verfahren zum herstellen von integrierten mos-feldeffekttransistorschaltungen in siliziumgate-technologie mit silizid beschichteten diffusionsgebieten als niederohmige leiterbahnen
DE3317535A1 (de) Duennfilmtransistor
DE69113571T2 (de) MIS-Transistor mit Heteroübergang.
DE69320572T2 (de) Dünnfilm-Halbleiteranordnung und Verfahren zur ihrer Herstellung
EP0142632A1 (de) Verfahren zum Herstellen von Bipolartransistorstrukturen mit selbstjustierten Emitter- und Basisbereichen für Höchstfrequenzschaltungen
DE2845460A1 (de) Verfahren zur herstellung einer halbleitervorrichtung
DE3700620A1 (de) Halbleiterkoerper und verfahren zum herstellen desselben
DE2605830A1 (de) Verfahren zur herstellung von halbleiterbauelementen
DE4420052A1 (de) Verfahren zur Herstellung eines Gates in einer Halbleitereinrichtung
DE4313042C2 (de) Diamantschichten mit hitzebeständigen Ohmschen Elektroden und Herstellungsverfahren dafür

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC LCD TECHNOLOGIES, LTD., KAWASAKI, KANAGAWA, JP

8327 Change in the person/name/address of the patent owner

Owner name: NEC CORP., TOKYO, JP

R082 Change of representative

Ref document number: 678907

Country of ref document: EP

Representative=s name: MUELLER-BORE & PARTNER PATENTANWAELTE, EUROPEA, DE